3D Stacked Resistive Memory Crossbars for Neuromorphic Efficiency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional neuromorphic computing networks require significant physical space and power, limiting their application in industries such as biomedical, military, and mobile devices due to their large scale and high energy consumption.
Innovation Solution
An analog neuromorphic circuit implementing a three-dimensional stack of resistive memory crossbar configurations, which allows for simultaneous execution of multiple operations through input and output selectors and activation functions, reducing the need for extensive physical space and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional neuromorphic computing networks are implemented in large scale computer clusters, then computational efficiency is improved, but physical space and power consumption increase significantly
Solution Approach 1:
The patent transitions from two-dimensional planar arrangements of neurons and synapses to three-dimensional stacked configurations. Multiple layers of crossbar arrays are vertically stacked with through-silicon vias connecting corresponding nodes across layers, enabling dense integration of computational elements in the vertical dimension while maintaining compact footprint on the substrate.
Solution Approach 2:
The patent implements hierarchical nesting where crossbar arrays are organized into modular neuron blocks, which are then stacked and interconnected to form larger neural network structures. Each crossbar array contains nested rows and columns of synapses, creating a fractal-like organization that maximizes computational density within limited space.
2Productivity
If conventional neuromorphic computing networks are implemented in large scale computer clusters, then computational efficiency is improved, but power consumption increases significantly
Solution Approach 1:
The patent replaces conventional digital computing mechanisms with analog continuous voltage representations for neural activations and weights. Multiplication operations are performed through passive Ohmic conduction in resistive memory elements, and addition operations occur naturally through Kirchhoff's current law at node intersections, eliminating the need for active digital logic circuits and significantly reducing power consumption.
Solution Approach 2:
The patent utilizes the inherent physical properties of resistive memory crossbars to perform computational functions without requiring additional active control circuitry. The resistive elements naturally conduct current proportional to applied voltage (multiplication), and current sums automatically at intersection nodes (addition), allowing the hardware structure itself to provide the computational service rather than requiring separate processing units.
3Productivity
If conventional neuromorphic computing networks are implemented, then simultaneous execution of multiple operations is achieved, but device complexity increases
Solution Approach 1:
The patent divides the neural network into discrete modular blocks, where each block contains a finite number of neurons implemented as crossbar arrays with specific dimensions. This segmentation allows complex neural networks to be constructed from standardized, manufacturable units while maintaining simultaneous parallel execution of operations across all blocks through shared input and output routing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly enhances computational efficiency while minimizing power and space requirements, enabling the implementation of neuromorphic computing in previously constrained environments by allowing for compact, low-power neural networks capable of complex computations.
Implementation Method 1
A plurality of output voltages is generated by the first selected resistive memory crossbar configuration from a propagation of the input voltages through a plurality of resistive memories positioned on the first selected resistive memory crossbar configuration
Data Source
AI summary
An analog neuromorphic circuit is disclosed having a resistive memory crossbar configurations positioned in the analog neuromorphic circuit forming a 3D stack. Input voltages are applied to an input selector unit that selects a first selected resistive memory crossbar configuration that the input voltages are applied. Output voltages are generated by the first selected resistive memory crossbar configuration from a propagation of the input voltages through resistive memories positioned on the first selected resistive memory crossbar configuration. An output selector unit selects the first selected resistive memory crossbar configuration that generates the output voltages. Each output voltage corresponds to an output of the first selected resistive memory crossbar configuration as selected by the output selector. An activation function unit receives the output voltages generated from the first selected memory crossbar configuration and executes a function based on the output voltages received from the first selected resistive memory crossbar configuration.