3D Stacked Uncooled IR Sensor via Segmented Wafer Bonding
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Solution Overview
Problem
Uncooled infrared sensors are larger and more expensive than visible chip cameras due to the integration of bolometers and signal processing circuits on the same die, leading to a low bolometer fill factor and increased manufacturing costs, making them unaffordable for low-cost sensing applications.
Innovation Solution
The solution involves fabricating bolometers on one die without additional processing circuitry and separating the signal processing circuits onto a distinct die, which is vertically stacked using through silicon vias (TSVs) for 3D integration at the wafer level, allowing for optimized manufacturing processes for each component and maximizing die count per wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bolometers and signal processing circuits are integrated on the same die, then the device can be manufactured as a single unit, but the bolometer fill factor decreases and manufacturing cost increases
Solution Approach 1:
The patent divides the integrated circuit into two separate dies: one dedicated to bolometers and another to signal processing circuits. This segmentation allows each die to be optimized independently, maximizing the bolometer fill factor on the first die while accommodating all necessary processing circuits on the second die, thereby resolving the contradiction between fill factor and manufacturing complexity
Solution Approach 2:
The patent transitions from a planar integration approach to a three-dimensional stacked architecture using through-silicon vias (TSVs). By stacking the bolometer die and signal processing die vertically, the system achieves high fill factor while maintaining all required functionality, effectively using the vertical dimension to resolve the area constraint
2Device complexity
If all processing circuits are included on the same die as bolometers, then the device is simpler in structure, but the manufacturing cost increases due to complex silicon processes
Solution Approach 1:
The patent separates the device into two independent dies with distinct manufacturing processes. The first die uses simplified bolometer fabrication processes, while the second die uses standard CMOS processing for signal processing circuits. This segmentation allows each die to be manufactured using optimized processes, reducing overall manufacturing cost while maintaining functional completeness
Solution Approach 2:
The patent introduces an intermediary interconnect layer using through-silicon vias (TSVs) between the two separate dies. This intermediary structure enables electrical and data communication between the bolometer die and signal processing die, allowing the system to achieve the functionality of a single integrated die while benefiting from separate optimized manufacturing processes
3Adaptability or versatility
If the bolometer die includes additional processing circuitry, then the device is more self-contained, but the bolometer fill factor decreases
Solution Approach 1:
The patent divides functional responsibilities between two separate dies: the first die contains only bolometers with high fill factor, while the second die contains all necessary processing circuits including amplifiers, A/D converters, and non-uniformity correction. This segmentation maintains maximum bolometer fill factor while ensuring complete device functionality through the second die
Solution Approach 2:
The second die serves multiple functions: it houses signal processing circuits, amplifiers, analog-to-digital converters, and non-uniformity correction capabilities. This multi-functional design allows the system to achieve complete adaptability and versatility without compromising the bolometer fill factor on the first die
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces the total cost of the uncooled IR focal plane array sensors, increases the bolometer fill factor, and enables the inclusion of additional features like amplifiers and non-uniformity correction on the signal processing die without affecting the bolometer fill factor, making the technology more affordable and suitable for applications like hand-held units and surveillance.
Implementation Method 1
through silicon vias (TSVs)
Implementation Method 2
a thin metal bonding layer (formed for example, from copper tin, indium, gold, nickel, silver, palladium, palladium-nickel alloy or titanium) is applied to the respective surface of semiconductor components that are to be bonded. When the components are brought together under the correct conditions of temperature and pressure, the two metal bonding layers diffuse into each other to form an intermetallic compound (IMC) and create the bond.
Implementation Method 3
Soldering does not require such high temperatures as diffusion bonding and can still produce a good reliable bond. Solder type bonding methods comprise Al/Ge, Au/Sn, Au/Ge, and Cu/Sn.
Implementation Method 4
Adhesive bonding is an option in which an adhesive layer is provided on the surfaces to be bonded together. As an example, chips are bonded using conductive adhesives such as anisotropic conductive film (ACF) or anisotropic conductive adhesive (ACA).
Data Source
AI summary
A 3D wafer-integration uncooled infrared (IR) microbolometer focal plane array (FPA) sensor includes a first die with an FPA of uncooled IR microbolometers, a second die signal-processing layer. The dies are vertically aligned, stacked with 3D wafer bonding, and interconnected. Interconnection include vertical electrical interconnects. Separate optimized manufacturing processes are used for die, so that additional processing costs of the FPA die are leveraged and 3D integration is completed at wafer level, minimizing total device cost and maximizing die count per wafer.