3D Supervia Crackstop Architecture for Thin Dielectric Layers
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Solution Overview
Problem
As semiconductor technology advances and dielectric layer thicknesses decrease, traditional crackstop designs become less effective in preventing crack propagation due to reduced mechanical strength and increased susceptibility to cracking, leading to potential failures during dicing and operational stresses.
Innovation Solution
The integration of supervia and skipvia bar structures that extend across multiple dielectric layers, creating a three-dimensional crackstop architecture with staggered seam interfaces and interwoven metal plates, enhancing mechanical strength and robustness by breaking up linear vulnerable interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dielectric layer thickness is decreased to advance semiconductor technology nodes, then device scaling and integration density are improved, but crackstop structure strength and mechanical robustness deteriorate
Solution Approach 1:
The patent transitions from traditional two-dimensional crackstop structures (confined to single dielectric layers) to three-dimensional crackstop architectures that span multiple dielectric layers vertically. This dimensional extension allows crackstop structures to maintain adequate mechanical strength even as individual layer thicknesses decrease, by distributing stress across multiple layers and creating longer crack propagation paths through staggered seam interfaces.
Solution Approach 2:
The patent divides the crackstop structure into multiple segments distributed across different dielectric layers, with each segment terminated by metal plates at different heights. This segmentation creates staggered seam interfaces that prevent continuous crack propagation paths, forcing cracks to change direction and expend additional energy, thereby enhancing overall crackstop effectiveness despite reduced layer thicknesses.
2Ease of manufacture
If traditional crackstop design is used in thinner dielectric layers, then manufacturing simplicity is maintained, but crack propagation prevention capability deteriorates
Solution Approach 1:
The patent extends crackstop structures into the third dimension by having them span multiple dielectric layers vertically, creating a three-dimensional architecture. This approach maintains manufacturing feasibility using standard semiconductor fabrication processes while dramatically improving crack propagation prevention by forcing cracks to navigate complex three-dimensional paths with staggered interfaces.
Solution Approach 2:
The patent introduces metal plates as intermediary elements that terminate viabars at different heights across multiple dielectric layers. These metal plates serve as mediators that create discontinuous seam interfaces, effectively blocking crack propagation paths without requiring complex non-standard manufacturing processes.
3Strength
If viabar X and Y dimensions are increased to compensate for thinner layers, then crackstop strength is improved, but strain profile increases making layers more susceptible to crack initiation
Solution Approach 1:
Instead of increasing viabar dimensions in the X and Y planes (which would increase strain), the patent extends viabar structures in the Z dimension by having them span multiple dielectric layers. This vertical extension provides additional mechanical strength and crack propagation resistance without increasing in-plane dimensions, thereby avoiding the harmful strain effects.
Solution Approach 2:
The patent changes the critical parameter for crackstop strength from in-plane dimensions (X and Y) to vertical dimension (Z). By controlling viabar thickness and span across multiple layers rather than widening them in the plane, the design achieves enhanced strength while maintaining acceptable strain profiles and avoiding crack initiation susceptibility.
4Ease of manufacture
If aligned interfaces are used in layer-by-layer fabrication, then manufacturing alignment is simplified, but crack propagation vulnerability increases due to preferential growth paths
Solution Approach 1:
The patent segments the crackstop structure into multiple discontinuous sections across different dielectric layers, with each section terminated by metal plates at different heights. This segmentation creates staggered seam interfaces that break up continuous alignment paths, forcing cracks to change direction and expend additional energy, thereby preventing preferential crack propagation even though each individual layer maintains simple alignment.
Solution Approach 2:
The patent resolves the alignment vulnerability by extending crackstop structures into the third dimension with staggered terminations at different heights. This three-dimensional staggering prevents continuous crack paths while maintaining manufacturing simplicity, as each layer can still be fabricated with standard alignment procedures but the overall structure gains crack resistance through vertical displacement of interfaces.
Data Source
AI summary
A structure comprising: metal lines and viabars that surround a periphery of an active area of a semiconductor device; at least one viabar that extends through multiple layers of the semiconductor device, wherein the at least one viabar connects a metal line of one layer of the structure with a metal line of another layer of the structure; and a connection viabar that terminates at a metal line of a layer between the one layer of the structure and the another layer of the structure, wherein a thickness of the connection viabar is less than a thickness of the at least one viabar.


