3D Tap and Scan Port Architectures for Die Stack Testing

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Solution Overview

Problem

Existing die test architectures in 3D die stacks face challenges in enabling effective testing of each die level, as they require distinct but compatible test architectures, and existing standards like IEEE 1149.1 are limited in facilitating comprehensive testing across multiple die levels.

Innovation Solution

The development of customized test architectures for bottom, middle, and top dies in a 3D die stack, incorporating enhanced IEEE 1149.1 standards, including a TAP/TAP Complex, TAP Lock Unit, Up Control Unit, Reset Control Unit, Capture Shift Update Unit, and Scan Circuits, which allow for improved testing through unique signaling and multiplexing of test signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If distinct test architectures are designed for each die level (bottom, middle, top), then comprehensive testing capability is achieved, but device complexity increases

Engineering Contradiction:
Improvetesting capabilityVSAvoidarchitecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal TAP controller design that can operate in multiple modes (master and slave) to test different die levels. The same TAP controller architecture serves both as a master controller for bottom die testing and as a slave controller when the die is positioned in the middle or top of the stack, eliminating the need for completely separate test architectures for each die level.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The test architecture employs dynamic role assignment where TAP controllers can switch between master and slave modes depending on their position in the die stack. This dynamic flexibility allows the same hardware architecture to adapt to different testing scenarios, reducing overall system complexity while maintaining comprehensive testing capability.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If enhanced IEEE 1149.1 standards are implemented with additional control units and multiplexing, then testing precision and diagnostic capability improve, but device complexity increases

Engineering Contradiction:
Improvediagnostic capabilityVSAvoidcontrol circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple control functions into integrated units. The TAP controller merges sequence generation, signal coordination, and state management functions. The capture-shift-update unit consolidates data capture, shifting, and updating operations. This merging reduces the number of separate control circuits while enhancing diagnostic precision through coordinated control.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The enhanced control units are designed with multi-functionality to handle various testing operations. The TAP controller can generate different test sequences, manage multiple die levels, and adapt to different testing modes. The multiplexing capability allows the same control circuits to serve multiple purposes, improving diagnostic precision without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If multiplexing of test signals is implemented for high-speed testing, then productivity improves, but ease of operation decreases

Engineering Contradiction:
Improvetesting speedVSAvoidsignal control complexity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent merges multiple test signal paths into multiplexed channels. The TAP controller consolidates TDI, TDO, TMS, and TCK signal management into a unified control mechanism. The capture-shift-update unit multiplexes data flow paths, allowing high-speed testing through shared signal channels while the controller automatically manages the complexity of signal coordination.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250102569A13D tap & scan port architectures
Publication Date: 2025.03.27 TEXAS INSTRUMENTS INC
  • US20250102569A1 patent drawing
  • US20250102569A1 patent drawing
  • US20250102569A1 patent drawing

AI summary

This disclosure describes die test architectures that can be implemented in a first, middle and last die of a die stack. The die test architectures are mainly the same, but for the exceptions mentioned in this disclosure.