3D TMTJ Memory Stack With Shared Vertical Channels
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Solution Overview
Problem
Current spin-transfer torque magnetic random access memory (STT-MRAM) devices are limited by their two-dimensional configuration, which restricts the development of higher memory cell density.
Innovation Solution
A three-dimensional (3D) memory device structure is introduced, featuring a semiconductor layer with a stack structure that includes a cell array region and a staircase structure, comprising vertically stacked transistor-magnetic tunnel junction (TMTJ) elements with shared channel structures, allowing for increased memory cell density through vertical alignment and shared components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a two-dimensional configuration of memory cells is used, then the device structure is simple, but the memory cell density is limited
Solution Approach 1:
The patent transitions from a two-dimensional memory cell arrangement to a three-dimensional stacked configuration. Multiple memory cell levels are vertically stacked above each other, allowing memory cells to be arranged in three dimensions rather than confined to a single plane. This dimensional change enables significantly higher memory cell density within the same footprint area while maintaining manageable structural complexity through modular stacking architecture.
2Quantity of substance
If vertically stacked TMTJ elements with shared channel structures are used, then memory cell density increases, but manufacturing complexity increases
Solution Approach 1:
The patent merges multiple memory cell structures by implementing shared channel structures that are vertically extended and shared among multiple memory cell levels. Instead of creating completely separate structures for each memory cell level, the channel structures are combined and shared resources across levels, reducing the total number of discrete components and simplifying the manufacturing process while maintaining high memory cell density.
Solution Approach 2:
The shared channel structures serve multiple functions and multiple memory cells simultaneously. A single channel structure can be shared by multiple TMTJ elements at different vertical levels, making the structure universal and multi-functional. This reduces manufacturing complexity by eliminating the need to create separate channel structures for each memory cell, while still achieving high memory cell density through efficient resource sharing.
3Ease of manufacture
If channel structures are shared by multiple MTJ elements, then manufacturing is simplified, but operational independence may be compromised
Solution Approach 1:
The patent segments the memory device into multiple independent memory cell levels, where each level contains complete TMTJ elements with their own magnetic free layers, magnetic reference layers, and tunnel barrier layers. While channel structures are shared vertically, the critical memory storage and access components are segmented into discrete, independently operable units at each level, ensuring that operations at one level do not interfere with operations at other levels.
Solution Approach 2:
The patent implements local quality by providing each memory cell level with its own dedicated magnetic free layer, magnetic reference layer, and tunnel barrier layer, while only the channel structures are shared. This ensures that the critical components that determine memory cell operation and data storage are locally specific to each memory cell, maintaining operational independence and reliability even though the channel structures are shared across multiple levels.
Data Source
AI summary
A memory device includes a semiconductor layer and a stack structure over the semiconductor layer. The stack structure includes a cell array region and a staircase structure region. The cell array region includes multiple vertical levels of stacked transistor-magnetic tunnel junction (TMTJ) elements and a plurality of channel structures vertically extending through the stack structure. At least one channel structure includes a vertical core, a vertical magnetic reference layer, and a vertical tunnel barrier layer, which are shared by a set of magnetic tunnel junction (MTJ) elements associated with the at least one channel structure. The set of MTJ elements are located at different vertical levels of the stack structure.