3D Transformer Structure for High Q-Factor RF Circuits
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Solution Overview
Problem
Current on-chip inductor designs for RF circuits face challenges in achieving high Q-factor and self-resonance frequency while minimizing occupied area, which is crucial for high-frequency applications like mobile communications.
Innovation Solution
The development of a three-dimensional transformer structure with multiple metal layers, where the primary and secondary coils are wound in the same direction, and radial wiring channels provide external connections, optimizing ohmic and eddy current losses, and featuring series-parallel interconnections for higher impedance transformation ratios.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If traditional planar inductor designs are used, then the occupied area is large, but the Q-factor and self-resonance frequency are limited
Solution Approach 1:
The patent transitions from traditional planar (2D) inductor designs to a three-dimensional stacked configuration where multiple inductor layers are vertically arranged and interconnected through via holes. This vertical stacking enables the inductor to achieve higher Q-factor and self-resonance frequency while occupying less chip area, as the effective inductance is increased through the third dimension without proportionally increasing the planar footprint.
2Reliability
If coil track width is increased to reduce resistance, then Q-factor improves, but occupied area increases
Solution Approach 1:
Instead of increasing coil track width in the planar direction to reduce resistance, the patent implements multiple inductor layers stacked vertically, each contributing to the total inductance. The via holes provide low-resistance vertical interconnections between layers, effectively reducing overall resistance without requiring wider tracks in any single layer, thus maintaining compact area while improving Q-factor.
3Reliability
If high-resistivity substrate is used to reduce metal-to-substrate capacitance, then self-resonance frequency increases, but manufacturing complexity increases
Solution Approach 1:
The patent achieves reduced metal-to-substrate capacitance effect by elevating the inductor structure into the third dimension with multiple stacked layers. This vertical configuration increases the effective distance between the inductor windings and the substrate, thereby reducing parasitic capacitance without requiring high-resistivity substrates, thus maintaining standard manufacturing processes while achieving high self-resonance frequency.
4Area of moving object
If multiple metal layers are stacked vertically, then occupied area is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent implements a stacked inductor configuration using standard multi-layer PCB or semiconductor fabrication techniques. The via holes providing vertical interconnections are designed with appropriate diameter and spacing to ensure mechanical and electrical alignment between layers. Standard fabrication tolerances are sufficient to achieve the required alignment precision, making the manufacturing process compatible with existing industrial capabilities while achieving compact area occupation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves reduced occupied area, higher efficiency, and increased power gain, specifically benefiting high-frequency applications by enhancing the Q-factor and self-resonance frequency, thus improving the performance of RF circuits.
Implementation Method 1
On-chip transformers are formed from inductor-like structures. On-chip transformers are needed in radiofrequency (RF) circuits for a number of functions including impedance transformation, differential to single conversion and vice versa (balun), DC isolation and bandwidth enhancement
Implementation Method 2
where L is the inductance value of the inductor and C may be the capacitance value associated with the inductor coil's inter-winding capacitance
Data Source
AI summary
A transformer structure includes at least three sections, each corresponding to metal layers of an integrated circuit. A first section of the at least three sections is electrically coupled to a third section with a second section disposed between the first and third sections. The at least three sections includes inductor coils, all of which are wound in a same direction and voltage phase starting at an outer terminal and continuing to an inner terminal of each inductor coil. At least one radial wiring channel passes through a portion of a coil in one of the three sections to provide an external connection to an internal terminal of the coil in at least one of the three sections.