3D Transistor Channel Doping for High-Temperature Reliability
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Solution Overview
Problem
Thin-film transistors (TFTs) experience performance degradation in high temperatures above 400°C and chemical environments, such as hydrogen-based gases, which limits their reliability and efficiency in modern electronic devices.
Innovation Solution
Incorporating additional materials into the channel layer of TFTs, such as IGZO, through in situ doping, ion beam implantation, or plasma immersion, to form stronger bonds and enhance conductivity, thereby suppressing defect formation and improving performance in high-temperature and chemical environments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional materials are incorporated into the channel layer through doping or implantation, then conductivity and bond strength are improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies composite materials by incorporating additional materials (such as silicon, germanium, or other dopants) into the IGZO channel layer through in situ doping, ion beam implantation, or plasma immersion. This creates a composite channel structure where the base IGZO material provides the primary semiconductor properties while the additional materials enhance conductivity and form stronger bonds, improving TFT reliability in high temperature and chemical environments without fundamentally changing the manufacturing process flow
Solution Approach 2:
The patent applies parameter changes by modifying the conductivity of the channel layer through controlled incorporation of additional materials. By adjusting the concentration and type of dopants or implanted ions, the electrical properties of the channel layer can be precisely tuned to achieve optimal performance in specific applications, allowing flexibility in device design while maintaining manufacturing feasibility
2Reliability
If in situ doping or ion beam implantation is used to add materials to the channel layer, then conductivity is enhanced, but manufacturing process complexity increases
Solution Approach 1:
The patent applies preliminary action by performing in situ doping during the deposition process itself, rather than as a separate subsequent step. This allows the additional materials to be incorporated into the channel layer as it is being formed, ensuring uniform distribution and strong bonding while simplifying the overall manufacturing process. The doping action is performed preliminarily, before the channel layer is fully completed, which reduces the need for additional processing steps
Solution Approach 2:
The patent applies merging by combining the doping or implantation process with the channel layer deposition process. Instead of treating these as separate manufacturing steps, the additional materials are introduced and incorporated during the same processing window, reducing the total number of fabrication steps and simplifying manufacturing while achieving the desired conductivity enhancement and defect suppression
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The modified channel layer with additional materials exhibits improved conductivity and reliability, maintaining performance in harsh conditions, leading to enhanced operational stability and efficiency of TFTs in integrated circuits.
Implementation Method 1
Incorporating additional materials into the channel layer of TFTs, such as IGZO, through in situ doping, ion beam implantation, or plasma immersion
Implementation Method 2
Incorporating additional materials into the channel layer of TFTs, such as IGZO, through in situ doping, ion beam implantation, or plasma immersion
Implementation Method 3
The elements of the one or more additional materials are bonded with elements of the first channel material
Data Source
AI summary
Embodiments herein describe techniques for a transistor above a substrate. The transistor includes a channel layer above the substrate. The channel layer includes a first channel material of a first conductivity. In addition, the channel layer further includes elements of one or more additional materials distributed within the channel layer. The channel layer including the elements of the one or more additional materials has a second conductivity different from the first conductivity. Other embodiments may be described and/or claimed.