3D Virtual Ground Memory for High-Density Random Access
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Solution Overview
Problem
Current 3D memory technologies face limitations in density and random access capabilities, particularly for NAND architecture, which restricts their suitability for high-speed applications.
Innovation Solution
A vertical memory structure is implemented using a stack of alternating insulator and word line materials with conductive and insulating pillars, allowing for high-density storage and random access through a unique arrangement of semiconductor channels and data storage structures, along with conductive strips and bit line conductors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If NAND architecture is used to achieve high density, then storage density is improved, but random access capability deteriorates
Solution Approach 1:
The patent transitions from planar 2D memory architecture to three-dimensional stacked architecture, where multiple memory planes are stacked vertically. This dimensional change enables high density through vertical stacking while maintaining random access capability by preserving the independent word line and bit line structure in each plane, unlike NAND's series-connected architecture.
2Quantity of substance
If critical dimensions are shrunk to limits, then storage density is improved, but manufacturing precision requirements worsen
Solution Approach 1:
Instead of continuing to shrink critical dimensions in the lateral direction, the patent stacks multiple memory planes vertically in the third dimension. This approach increases storage density by utilizing vertical space rather than reducing feature sizes, thereby avoiding the escalating manufacturing precision requirements that come with sub-lithographic scaling.
Solution Approach 2:
The patent implements multiple complete memory planes nested vertically within a single integrated structure. Each plane contains its own alternating layers of insulator and word line materials with conductive pillars extending through the stack, creating a nested configuration that achieves high density without requiring proportionally smaller critical dimensions.
3Quantity of substance
If vertical stacking is implemented, then storage density is improved, but device complexity worsens
Solution Approach 1:
The patent employs alternating layers of insulator and word line materials that serve multiple functions: they provide electrical isolation between memory cells, form the word line conductors for selecting memory rows, and create the structural framework for the vertical stack. The conductive pillars serve as both vertical interconnects and source/drain regions, reducing the need for separate components and simplifying the overall device structure despite the three-dimensional configuration.
Data Source
AI summary
Memory devices are implemented within a vertical memory structure, comprising a stack of alternating layers of insulator material and word line material, with a series of alternating conductive pillars and insulating pillars disposed through stack. Data storage structures are disposed on inside surfaces of the layers of word line material at cross-points of the insulating pillars and the layers of word line material. Semiconductor channel material is disposed between the insulating pillars and the data storage structures at cross-points of the insulating pillars with the layers of word line material. The semiconductor channel material extends around an outside surface of the insulating pillars, contacting the adjacent conductive pillars on both sides to provide source/drain terminals.