3DIC Bonding Metal Structure for Better Thermal and Electrical Paths

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving efficient integration and performance in three-dimensional integrated circuits (3DICs) due to complexities in forming reliable bonding structures and interconnects between stacked chips, which affect electrical and thermal performance.

Innovation Solution

A method for forming a 3DIC structure involves creating a bonding dielectric layer with a blocking layer and multiple bonding dielectric materials, followed by planarization and etching processes to form openings and via holes, allowing for the formation of a conductive bonding metal layer with a metal feature that exceeds the height of a via plug, enhancing connectivity and thermal dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional bonding structure with via plugs is used, then the manufacturing process is simple, but the electrical and thermal performance is insufficient

Engineering Contradiction:
Improveelectrical and thermal performanceVSAvoidbonding structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The bonding structure is segmented into multiple functional layers: a via plug layer for electrical connection, a bonding dielectric layer for insulation, and a metal feature layer for enhanced thermal and electrical performance. This segmentation allows each layer to be optimized independently, resolving the contradiction between performance and complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bonding structure employs composite materials including conductive metal features (copper, aluminum, or tungsten) combined with insulating bonding dielectric materials (oxides, nitrides, or polymers). This composite approach enables simultaneous optimization of electrical conductivity and thermal dissipation while maintaining structural integrity.

Inventive Principle:
Principle #40Composite materials

2Temperature

If the metal feature height is increased to improve thermal dissipation, then the thermal performance improves, but the manufacturing complexity increases

Engineering Contradiction:
Improvethermal dissipationVSAvoidmetal feature height control
Core Design Contradiction:
TemperatureVSManufacturing precision

Solution Approach 1:

The via plug is formed first as a preliminary structure, followed by the formation of the bonding dielectric layer, and finally the metal feature is deposited over the via plug. This sequential preliminary action allows precise control of the metal feature height relative to the via plug, enabling optimized thermal dissipation while maintaining manufacturability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The height of the metal feature is optimized as a key parameter, with the metal feature extending higher than the via plug to increase thermal dissipation surface area. This parameter change is achieved through controlled deposition processes that maintain precision while improving thermal performance.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12176344B2Methods of forming semiconductor structure
Publication Date: 2024.12.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12176344B2 patent drawing
  • US12176344B2 patent drawing
  • US12176344B2 patent drawing

AI summary

A method of forming a semiconductor structure includes: forming an interconnect structure over a substrate; forming a pad over the interconnect structure, wherein the pad is electrically connected to the interconnect structure; forming a bonding dielectric layer over the interconnect structure; and forming a bonding metal layer in the bonding dielectric layer to electrically connect to the interconnect structure, wherein the bonding metal layer includes a via plug and a metal feature formed over the via plug, a height of the metal feature is greater than or equal to a height of the via plug.