3DIC Die Liner Structure for Delamination and Crack Resistance
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Solution Overview
Problem
The semiconductor industry faces manufacturing challenges in producing three-dimensional integrated circuits (3DICs) due to issues such as delamination and cracking of semiconductor dies during thermal cycling, testing, or operation.
Innovation Solution
The implementation of a protective liner with greater density around semiconductor dies and the use of gap-filling layers in the gaps between dies, along with a support substrate and redistribution structures, to enhance structural support and reduce stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor dies are stacked to form 3DICs, then integration density is improved, but delamination and cracking occur during thermal cycling
Solution Approach 1:
A protective liner is introduced as an intermediary layer between adjacent semiconductor dies in the 3DIC stack. This liner material acts as a stress buffer and thermal expansion mediator, preventing direct stress transfer between dies during thermal cycling, thereby eliminating delamination and cracking while maintaining high integration density
Solution Approach 2:
The patent changes the physical and chemical parameters of the protective liner material to match or bridge the thermal expansion coefficients of adjacent dies. By carefully selecting liner materials with appropriate density, composition, and thermal properties, the structure accommodates thermal cycling stresses without causing delamination or cracking
2Strength
If gap-filling layers are used between dies, then structural support is improved, but manufacturing complexity increases
Solution Approach 1:
The patent combines the protective liner formation and gap-filling operations into a single integrated process step. The protective liner material simultaneously serves as both the protective barrier between dies and the gap-filling substance, eliminating the need for separate gap-filling layers and reducing manufacturing complexity while maintaining structural support
Data Source
AI summary
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a first die, a second die laterally spaced apart from the first die, a first protective liner, and a support substrate. Each of the first and second dies includes an active side, a back side, a first sidewall connected to the active and back sides, and a second sidewall opposite to the first sidewall and connected to the active and back sides. The first protective liner includes a first portion lining the first sidewall of the first die and a second portion lining the first sidewall of the second die facing the first sidewall of the first die. The support substrate is disposed over the back sides of the first and second dies, and the support substrate includes a sidewall coterminous with the second sidewalls of the first and second dies.