3DIC Die Gap Dielectric Filling Without Void Sealing

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Solution Overview

Problem

The challenge in forming three-dimensional integrated circuit (3DIC) structures lies in efficiently filling gaps between stacked dies with a dielectric material, as conventional deposition methods often result in incomplete filling due to high aspect ratios, leading to voids and performance issues.

Innovation Solution

A method involving a non-conformal deposition process, such as HDP-CVD, is used to modify the gap profile by forming a first dielectric layer with a smaller thickness at the top portion of the sidewall, followed by a conformal deposition process, like PECVD, to fill the gap completely without voids, using a sequence of deposition and etching cycles to achieve a suitable gap profile for subsequent material deposition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional deposition methods are used to fill gaps between stacked dies, then the process is simple, but the gap filling is incomplete due to high aspect ratios, leading to void formation

Engineering Contradiction:
Improvegap filling completenessVSAvoiddeposition process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The deposition process is divided into multiple sequential deposition cycles, where each cycle deposits a portion of the dielectric material. This segmentation allows the gap to be filled incrementally, preventing void formation while maintaining process control despite the increased complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gap profile is modified in advance through preliminary deposition and etching cycles before the final material deposition. This preliminary action creates a favorable profile that enables complete filling in subsequent steps, addressing the completeness issue before the main deposition occurs

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the gap aspect ratio is high, then the 3DIC structure can accommodate stacked dies, but conventional deposition cannot completely fill the gap, resulting in voids

Engineering Contradiction:
Improvedevice performanceVSAvoidgap filling completeness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Preliminary deposition and etching cycles are performed to modify the gap profile before final material deposition. This preliminary action creates a tapered or modified profile that facilitates complete filling despite the high aspect ratio, ensuring no voids remain and device performance is maintained

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Multiple periodic cycles of deposition and etching are performed sequentially. Each cycle modifies the gap profile further, gradually creating conditions that allow complete filling in subsequent cycles, thereby achieving reliable gap filling in high aspect ratio structures

Inventive Principle:
Principle #19Periodic action

3Manufacturing precision

If non-conformal deposition is used to modify gap profile, then complete filling is achieved, but the process requires multiple deposition and etching cycles

Engineering Contradiction:
Improvegap filling completenessVSAvoidmanufacturing cycle time
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The complex gap profile modification is segmented into multiple deposition and etching cycles, where each cycle contributes partially to the final profile. This segmentation makes the complex process manageable and controllable, achieving complete filling despite the extended cycle time

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each deposition cycle deposits more material than ultimately needed, followed by etching that removes the excess. This partial/excessive action ensures the gap profile is adequately modified for complete filling, accepting some material waste to achieve the desired result

Inventive Principle:
Principle #16Partial or excessive action

4Manufacturing precision

If the top portion of the gap is sealed during deposition, then material cannot be deposited further, but this prevents complete filling of the gap

Engineering Contradiction:
Improvegap filling completenessVSAvoiddeposition process ease
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The gap profile is preliminarily modified through deposition and etching cycles to create a tapered shape before final material deposition. This preliminary action prevents top sealing by ensuring the gap remains open at the top throughout the filling process, maintaining ease of manufacture while achieving complete filling

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of attempting to fill a vertical gap that seals at the top, the approach is inverted by first creating a modified profile where the top is wider than the bottom. This inversion prevents sealing and allows material to be deposited completely, simplifying the overall filling process

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures complete filling of the gap between dies, reducing the aspect ratio and preventing void formation, thereby enhancing the performance and reliability of the 3DIC structure by maintaining the gap without undesired sealing at the top.

Implementation Method 1

A method involving a non-conformal deposition process, such as HDP-CVD, is used to modify the gap profile by forming a first dielectric layer

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 2

followed by a conformal deposition process, like PECVD, to fill the gap completely without voids

Methodology Applied
Scientific EffectPlasma Enhanced Chemical Vapour Deposition: Plasma Enhanced Chemical Vapour Deposition

Data Source

PatentUS20240371852A1Methods of manufacturing semiconductor device
Publication Date: 2024.11.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240371852A1 patent drawing
  • US20240371852A1 patent drawing
  • US20240371852A1 patent drawing

AI summary

A method of manufacturing a semiconductor device includes the following steps. A gap is formed. A first dielectric layer is formed in the gap, wherein the first dielectric layer has a sidewall and a bottom, a first surface of the sidewall and a first surface of the bottom form a first angle, and a second angle smaller than the first angle is formed by a second surface of the sidewall and a second surface of the bottom.