3DIC Interconnect Structure for Wafer Thinning and Dense Bonding
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to create smaller, more efficient stacked semiconductor devices with improved integration density and reduced form factor while maintaining electrical connectivity between bonded wafers.
Innovation Solution
A method for forming interconnect structures between stacked semiconductor wafers involves bonding two wafers, thinning one wafer to expose underlying circuitry, forming openings, and filling them with conductive material to establish electrical connections, using multi-layered dielectric films for protection and selective etching techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If wafer thinning is performed to expose underlying circuitry for bonding, then integration density and form factor are improved, but structural strength and damage resistance deteriorate
Solution Approach 1:
The patent segments the wafer structure into multiple functional layers: the thinned first wafer substrate, the second wafer substrate, and intermediate dielectric layers. This segmentation allows the thinned regions to provide compact form factor while the remaining substrate portions and bonding structures maintain structural strength.
Solution Approach 2:
The patent employs composite material structures combining different dielectric materials (first and second dielectric materials with different etch selectivities) and conductive materials. These composite structures provide both mechanical support for structural strength and the necessary electrical connectivity for integration density.
2Manufacturing precision
If multi-layered dielectric films and selective etching are used to form interconnect structures, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent applies local quality by using dielectric materials with different etch selectivities in different regions. The first dielectric material has high etch selectivity for rapid opening formation, while the second dielectric material has low etch selectivity for protective purposes. This local differentiation enables precise interconnect formation without requiring complex process control.
3Quantity of substance
If conductive plugs are formed to establish electrical connections between stacked wafers, then integration density is improved, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary actions by pre-forming the conductive plugs within the first opening before finalizing the interconnect structure. The conductive material is deposited and patterned in advance, creating ready-made electrical pathways that simplify subsequent bonding and interconnection steps, thereby reducing overall manufacturing complexity.
Data Source
AI summary
An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. A multi-layer dielectric film is formed along sidewalls and a bottom of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits. A dielectric liner is formed, and the opening is filled with a conductive material to form a conductive plug.