3DIC Package Structure for Low Die TTV and Corner Protection
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Solution Overview
Problem
The semiconductor industry faces challenges in the development of three-dimensional integrated chips (3DICs) due to issues related to bonding and thinning processes, which affect the integration density, speed, and bandwidth, particularly in maintaining precise alignment and reducing thickness variation and corner damage during the grinding and planarization processes.
Innovation Solution
A method involving bonding dies to a wafer using a bonding structure with dielectric and conductive materials, followed by forming a dielectric layer to fill gaps and cover the dies, and performing controlled planarization processes to thin the dies while protecting the corners with the dielectric layer, which helps in reducing thickness variation and corner damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If grinding and planarization processes are performed to thin the dies, then the integration density and speed are improved, but the thickness variation and corner damage increase
Solution Approach 1:
A dielectric layer is formed over the dies before the thinning process to protect the die corners and surfaces during grinding and planarization. This preliminary protective action prevents corner damage and reduces thickness variation while allowing the thinning process to proceed effectively for improving integration density and signal speed.
Solution Approach 2:
The dielectric layer acts as a cushioning layer that absorbs mechanical stress and prevents direct contact between the grinding tools and the die corners. This beforehand cushioning protects the fragile die corners from damage during the thinning process while maintaining the required thickness reduction for performance improvement.
2Productivity
If grinding and planarization processes are performed to thin the dies, then the integration density and speed are improved, but the corner damage increases
Solution Approach 1:
The dielectric layer is deposited beforehand to protect die corners during the thinning process. This preliminary protective measure enables aggressive thinning for improved integration density while preventing corner damage that would compromise device reliability.
Solution Approach 2:
The dielectric layer serves as an intermediary between the mechanical grinding tools and the die corners. It transfers and distributes mechanical stresses, preventing direct damage to the die corners while allowing the thinning process to achieve the desired integration density improvements.
3Quantity of substance
If the dies are thinned to reduce interconnect length, then the bandwidth is improved, but the thickness variation increases
Solution Approach 1:
The dielectric layer is formed in advance to provide a protective and supporting structure during the thinning process. This preliminary action enables controlled removal of die material to reduce interconnect length for improved bandwidth while maintaining uniform thickness through the protective dielectric layer.
Data Source
AI summary
The disclosure provides a method of forming a package structure, and the method includes: bonding a die to a wafer; performing a thinning process on the die, wherein the die has a first total thickness variation (TTV) after performing the thinning process; forming a dielectric layer on the wafer to cover sidewalls and a top surface the die; performing a first removal process to remove a first portion of the dielectric layer and expose the top surface of the die; and performing a second removal process to remove a second portion of the dielectric layer and a portion of the die, wherein after performing the second removal process, the die has a second TTV less than the first TTV.