3DIC Design Method Parallel Physical Feature Evaluation
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Solution Overview
Problem
The design of three-dimensional integrated circuits (3DICs) requires comprehensive Design-Technology Co-Optimization (DTCO) to optimize system-level performance, which is challenging due to the complexity of integrating multiple dies with various physical and electrical features.
Innovation Solution
A method is introduced that involves generating a technology file modeling to create a complete design model, incorporating evaluation operations such as IR/EM, PPA, thermal, and mechanical stress analysis to evaluate specification data, and iteratively adjusting the design parameters to meet preset criteria, allowing for parallel evaluation of multiple physical features.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If comprehensive Design-Technology Co-Optimization (DTCO) is performed to optimize system-level performance, then design quality and performance are improved, but design complexity and development time increase
Solution Approach 1:
The patent divides the comprehensive DTCO process into separate evaluation operations, each targeting specific physical features (electrical, thermal, mechanical, etc.). This segmentation allows complex optimization to be managed through modular, independent analysis steps, reducing overall design complexity while maintaining system-level performance optimization.
Solution Approach 2:
The patent performs evaluation operations and parameter optimization before final manufacturing. By conducting preliminary analyses of electrical characteristics, thermal properties, mechanical stress, and other physical features in advance, the design can be optimized systematically, reducing complexity during later stages and ensuring performance requirements are met.
2Measurement precision
If multiple evaluation operations are performed sequentially to ensure comprehensive optimization, then design accuracy is improved, but development time increases
Solution Approach 1:
The patent combines multiple evaluation operations (electrical, thermal, mechanical, etc.) into a unified evaluation framework that processes all physical features simultaneously. This merging approach allows comprehensive optimization to be achieved in parallel rather than sequentially, maintaining high design accuracy while reducing total development time.
Solution Approach 2:
The patent transitions from sequential, one-dimensional evaluation to multi-dimensional parallel evaluation. By organizing evaluation operations to run concurrently across different physical dimensions (electrical, thermal, mechanical), the system achieves comprehensive optimization without the time penalty of sequential processing.
3Manufacturing precision
If iterative adjustment of design parameters is performed to meet preset criteria, then manufacturing quality is improved, but process complexity increases
Solution Approach 1:
The patent implements a feedback mechanism where evaluation results are automatically compared against preset criteria, and design parameters are iteratively adjusted based on this feedback. This systematic feedback loop ensures manufacturing quality compliance while managing process complexity through automated, rule-based optimization rather than manual iteration.
Data Source
AI summary
A method includes: generating first specification data of a semiconductor device; performing, to the first specification data, a first evaluation operation corresponding to a first physical feature to the first specification data, to generate first parameters; performing, to the first specification data, a second evaluation operation corresponding to a second physical feature different from the first physical feature, to generate second parameters; comparing the first parameters and the second parameters with preset parameters; and when the first parameters and the second parameters meet the preset parameters, manufacturing the semiconductor device according to the first specification data.