4H-SiC MOSFET Interface Engineering for Carrier Mobility Stability
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Solution Overview
Problem
Silicon carbide (SiC) semiconductor devices, particularly MOSFETs, face challenges due to surface unevenness and interface states between the SiC layer and the gate insulating layer, leading to decreased carrier mobility and reliability issues.
Innovation Solution
A semiconductor device with a 4H-SiC crystal structure and a silicon oxide layer, where the SiC layer has an off-angle of 0° to 8° relative to the {0001} face, and an interface termination region with a high nitrogen concentration (>1×10^21 cm^-3) is used to reduce surface roughness and interface states, enhancing carrier mobility and device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If a silicon carbide layer is used to form a MOSFET, then high temperature operation and low loss are achieved, but carrier mobility decreases due to surface unevenness and interface states
Solution Approach 1:
The patent changes the physical and chemical parameters of the SiC layer surface by controlling the off-angle (0° to 8°) and introducing a nitrogen-rich interface termination region with specific nitrogen concentration (≥1×10^21 cm^-3). These parameter changes modify the surface properties to reduce interface states and improve carrier mobility while maintaining high temperature operation capability
Solution Approach 2:
The patent applies local quality improvement by creating a nitrogen-rich interface termination region specifically at the SiC layer surface where the gate insulating layer contacts. This localized nitrogen enrichment (with concentration ≥1×10^21 cm^-3) addresses the interface state problem without affecting the bulk properties of the SiC layer, thereby improving carrier mobility locally at the critical interface region
2Reliability
If the surface of the silicon carbide layer is made smoother, then carrier mobility improves, but manufacturing complexity increases
Solution Approach 1:
Instead of complex mechanical or chemical polishing processes, the patent achieves surface smoothing by controlling the crystal growth parameters - specifically the off-angle of the SiC layer (0° to 8°). This parameter control during manufacturing inherently produces a smooth surface with reduced roughness, improving carrier mobility without adding complex post-processing steps
Solution Approach 2:
The patent performs preliminary action by pre-forming the smooth surface and nitrogen-rich interface termination region during the SiC layer growth process itself. By establishing the desired surface quality and interface composition upfront during crystal growth, subsequent manufacturing steps are simplified, avoiding the need for complex surface treatment processes later
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses the decrease in carrier mobility and reliability issues, improving the characteristics of the MOSFET by reducing surface roughness and interface states, leading to enhanced performance and stability.
Implementation Method 1
a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×10^21 cm−3
Data Source
AI summary
A semiconductor device of embodiments includes: a silicon carbide layer having a first face having an off angle equal to or more than 0° and equal to or less than 8° with respect to a {0001} face and a second face facing the first face and having a 4H-SiC crystal structure; a gate electrode extending in a first direction parallel to the first face; a silicon oxide layer between the silicon carbide layer and the gate electrode; and a region disposed between the silicon carbide layer and the silicon oxide layer and having a nitrogen concentration equal to or more than 1×1021 cm−3. Assuming that a first reference length in the first direction is 0.5 μm, a surface roughness of a surface of the silicon carbide layer in a range of the first reference length is equal to or less than 1 nm.