5G Clock Synchronization Mode Signaling for Consistent PTP Processing

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Solution Overview

Problem

The IEEE 1588 protocol supports multiple clock synchronization modes, leading to inconsistent deployments in 5G communication systems, which hinders clock synchronization and basic communication in automobile control and industrial networks.

Innovation Solution

A method and apparatus for indicating clock synchronization modes in a 5G communication system, using a session management function network element to provide first indication information to terminal and user plane function network elements, enabling them to process Precision Time Protocol packets accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the 5G communication system uses inconsistent clock synchronization modes, then the system supports multiple deployment scenarios, but clock synchronization of the industrial network or automobile control network cannot be implemented

Engineering Contradiction:
Improvesupport for multiple deployment scenariosVSAvoidclock synchronization implementation
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies preliminary action by having the SMF network element obtain and determine the clock synchronization mode in advance before the terminal device processes PTP packets. The SMF determines the clock synchronization mode based on network configuration and deployment scenario requirements, then provides this information to the terminal device through PDU session establishment or modification procedures. This ensures the terminal device is pre-configured with the correct mode (boundary clock, transparent clock, or end-to-end transparent clock) before actual clock synchronization operations begin, preventing inconsistencies and ensuring reliable synchronization.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the 5G communication system configures clock synchronization modes for all deployment scenarios, then clock synchronization can be implemented, but the system complexity increases

Engineering Contradiction:
Improveclock synchronization implementationVSAvoidsystem configuration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces the SMF network element as an intermediary that manages clock synchronization mode configuration. The SMF acts as a mediator between the network's clock synchronization requirements and the terminal device, centralizing the complexity of supporting multiple deployment scenarios in the network infrastructure rather than requiring each terminal device to handle all possible configurations. The SMF determines the appropriate mode based on network state and deployment scenario, then provides this information to terminal devices on demand, reducing the complexity burden on individual devices while maintaining comprehensive support for all scenarios.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the terminal device obtains clock synchronization mode information from the session management function network element, then consistent clock synchronization is achieved, but additional signaling overhead is introduced

Engineering Contradiction:
Improveclock synchronization consistencyVSAvoidsignaling overhead
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent merges the clock synchronization mode indication information with existing PDU session establishment or modification signaling procedures. Instead of introducing separate dedicated signaling messages for clock synchronization mode configuration, the SMF embeds the mode indication within the existing N1 SM information that is already being exchanged during PDU session setup or modification. This approach ensures consistent clock synchronization configuration while minimizing additional signaling overhead by utilizing already-established communication channels and message structures.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12574874B2Clock synchronization mode indication method and communication apparatus
Publication Date: 2026.03.10 HUAWEI TECH CO LTD
  • US12574874B2 patent drawing
  • US12574874B2 patent drawing
  • US12574874B2 patent drawing

AI summary

A clock synchronization mode indication method and a communication apparatus. A communication device in a 5G communication system obtains a clock synchronization mode. A session management function network element obtains first indication information, where the first indication information indicates a clock synchronization mode used in a communication system in which a terminal device and a user plane function network element are located. The session management function network element sends the first indication information to the terminal device.