6T Pixel Architecture High Voltage Supply Node Merging

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Solution Overview

Problem

Conventional six transistor (6T) pixel structures in solid-state image sensors face issues with reduced fill factor and increased possibility of shorts between high voltage supply lines and control lines, leading to movement artifacts and degraded yield due to the use of separate metal lines for pulsing the memory capacitor.

Innovation Solution

A controllable high voltage supply node is coupled to the memory capacitor, replacing the separate high voltage supply node and control line, allowing for multi-level voltage pulsing during reset, readout, and sampling, which increases signal swing and reduces the number of metal lines, thereby enhancing fill factor and yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a separate metal line is used to pulse Vmem to the memory capacitor, then the signal swing can be increased to compensate for threshold voltage loss, but the fill factor of the pixel decreases and the possibility of shorts between supply lines and control lines increases

Engineering Contradiction:
Improvesignal swingVSAvoidfill factor
Core Design Contradiction:
PowerVSArea of stationary object

Solution Approach 1:

The patent combines the separate Vmem supply line and control line into a single controllable high voltage supply node. This node is coupled to the memory capacitor and can be pulsed to different voltage levels (e.g., 0V, 2.5V, 5V) to achieve the necessary signal swing while eliminating the need for additional metal lines, thereby preserving fill factor.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The controllable high voltage supply node serves multiple functions: it acts as both the voltage supply and the control signal line for the memory capacitor. By integrating these functions into a single node, the patent avoids the trade-off between achieving sufficient signal swing and maintaining high fill factor.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If a separate metal line is used to pulse Vmem, then the signal swing can be increased, but the yield during manufacturing degrades due to increased possibility of shorts

Engineering Contradiction:
Improvesignal swingVSAvoidyield
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

By merging the Vmem supply and control functions into a single controllable high voltage supply node, the patent reduces the number of metal lines in the pixel circuit. This reduction directly decreases the probability of manufacturing defects such as shorts between adjacent lines, thereby improving yield while maintaining the necessary signal swing capability.

Inventive Principle:
Principle #5Merging (Combining)

3Power

If more metal lines are used in the pixel, then the signal swing can be maintained, but the row overhead time increases

Engineering Contradiction:
Improvesignal swingVSAvoidrow overhead time
Core Design Contradiction:
PowerVSLoss of time

Solution Approach 1:

The patent eliminates redundant metal lines by combining the Vmem supply and control functions into a single controllable high voltage supply node. This reduction in interconnect complexity decreases the time required for row operations, including sampling and readout, thereby reducing row overhead time while maintaining adequate signal swing.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution increases the fill factor and reduces the likelihood of shorts, resulting in improved signal swing and reduced row overhead time, especially beneficial for small photodiode capacitances, while maintaining compatibility with existing timing diagrams.

Implementation Method 1

The image obtaining photosensitive elements produce an electrical signal indicative of the light intensity of the image. The electrical signal of a photosensitive element is typically a current, which is proportional to the amount of electromagnetic radiation (light) falling onto that photosensitive element.

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

The sample and hold (S&H) stage of FIG. 1B 'sample' loads the voltage signal of source follower transistor M1, through the sample transistor, on the memory capacitor (Cmem). The voltage signal from the source follower transistor M1 will remain on the memory capacitor when the sample transistor is turned off.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8045028B1Six transistor (6T) pixel architecture
Publication Date: 2011.10.25 SEMICON COMPONENTS IND LLC
  • US8045028B1 patent drawing
  • US8045028B1 patent drawing
  • US8045028B1 patent drawing

AI summary

A pixel having a high voltage DC supply being replaced by a pulsed signal high voltage supply that is coupled to one of the plates of a memory capacitor in the pixel.