6T SRAM Cell Separate Supply Voltages
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Solution Overview
Problem
Conventional 6T static random access memory cells experience interference between nodes during reading and writing, leading to erroneous data due to mutual voltage interference and high power consumption.
Innovation Solution
The proposed 6T static random access memory cell design includes separate high supply voltages for each inverter and access transistors, allowing for reduced voltage requirements and separate timing for word lines during data access, utilizing ground sensing for improved stability and minimizing interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate high supply voltages are used for each inverter, then data stability and interference prevention are improved, but device complexity increases
Solution Approach 1:
The patent divides the single high supply voltage into two separate high supply voltages (first high supply voltage and second high supply voltage) that are independently coupled to the first and second pull-up transistors respectively. This segmentation allows independent control of voltage levels at different nodes, preventing mutual interference between storage nodes Q and QB during read/write operations, thereby improving data stability while maintaining manageable device complexity through systematic voltage separation.
2Device complexity
If conventional 6T SRAM cell structure is used, then device complexity is reduced, but mutual interference between nodes causes erroneous data
Solution Approach 1:
The patent applies local quality by providing different voltage conditions to different parts of the circuit. Specifically, the first pull-up transistor receives a first high supply voltage while the second pull-up transistor receives a second high supply voltage. This localized voltage differentiation ensures that each inverter operates with optimized voltage levels, preventing the mutual interference that occurs in conventional cells where both nodes share the same supply voltage, thus improving data integrity without significantly increasing overall device complexity.
3Ease of operation
If voltage division occurs during reading, then reading operation is simplified, but storage values interfere with each other causing errors
Solution Approach 1:
The patent introduces separate high supply voltages as intermediary elements between the bit lines and the storage nodes. During read operations, the first high supply voltage acts as an intermediary that isolates the first storage node from the second storage node, preventing the voltage division effect from causing mutual interference. This allows the reading operation to proceed with simplified voltage control while maintaining data accuracy through the mediating effect of the separated voltage supplies.
Data Source
AI summary
A 6T static random access memory cell, array, and memory thereof are provided, in which the memory cell includes a first inverter, a second inverter, a first access transistor, and a second access transistor. A first high supply voltage and a low supply voltage are coupled to the first inverter. A second high supply voltage and the low supply voltage are coupled to the second inverter. The first access transistor has a gate terminal coupled to a first word line. The first access transistor has a source terminal coupled to the first node. The second access transistor has a gate terminal coupled to a second word line, and the second access transistor has a source terminal coupled to the second node. The first word line provides ON signals to turn on the first access transistor, and the second high supply voltage provides a first differential voltage simultaneously.