8b/9b Bus Decoding for Two-Aggressor Crosstalk Control
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Solution Overview
Problem
High speed parallel bus architectures face signal integrity issues such as crosstalk, inter-symbol interference, and simultaneous switching output noise, which existing solutions like Data Bus Inversion and physical layout modifications are insufficient to fully address, especially due to cost and practical limitations.
Innovation Solution
An 8b/9b encoding scheme is implemented, where data words are mapped to valid code words that do not have three consecutive logic-high bits, allowing for reduced crosstalk by controlling bit transitions on the parallel bus, effectively eliminating two-aggressor crosstalk while allowing one-aggressor crosstalk to maintain signal integrity at higher clock frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional encoding techniques like Data Bus Inversion are used, then power consumption is reduced, but crosstalk is not adequately addressed
Solution Approach 1:
The patent changes the encoding parameters from simple inversion based on bit count to a transition-based encoding scheme. Each code word represents a transition pattern (rising, falling, or no transition) for each bit position, fundamentally changing how data is encoded to control crosstalk while maintaining power efficiency
Solution Approach 2:
The patent applies preliminary action by pre-defining a code book of valid code words that represent specific transition patterns before transmission. The encoder selects from these pre-planned transition patterns based on the data to be transmitted, allowing proactive control of crosstalk rather than reactive correction
2Reliability
If physical layout modifications are made to reduce crosstalk, then signal integrity improves, but device complexity and cost increase
Solution Approach 1:
The patent substitutes the mechanical/physical approach of trace layout modification with an electrical/encoding approach. Instead of physically separating traces or adding ground wires, the solution uses encoded transition patterns to control signal behavior, replacing physical modifications with logical encoding
Solution Approach 2:
The patent introduces an intermediary encoding layer between the data source and the physical transmission medium. The encoder and decoder act as intermediaries that translate data into controlled transition patterns, mediating the interaction between digital logic and physical signal transmission to reduce crosstalk
3Productivity
If higher clock frequencies are used, then data transmission speed increases, but crosstalk and signal integrity issues worsen
Solution Approach 1:
The patent changes the temporal parameters of signal transmission by controlling the timing and pattern of bit transitions. By encoding data as specific transition patterns (rising, falling, or no transition) and controlling when these transitions occur, the system can operate at higher clock frequencies while maintaining signal integrity through reduced simultaneous switching
Data Source
AI summary
Systems and methods for encoding a data word using an 8b/9b encoding scheme that eliminates two-aggressor crosstalk are disclosed. The 8b/9b encoding scheme enables a data word that can be subdivided into portions of eight bits or less to be encoded using code words having one extra bit than the corresponding portion of the data word. Each of the valid code words does not include any three consecutive bits having a logic level of logic-high (i.e., ‘1’), and represent transition vectors for consecutive symbols transmitted over the high speed parallel bus. An encoder and corresponding decoder are disclosed for implementing the 8b/9b encoding scheme. In one embodiment, the encoder/decoder implements a modified Fibonacci sequence algorithm. In another embodiment, the encoder/decoder implements a look-up table. In some embodiments, data words may be less than eight bits wide.