Distorted Aberration Correction Using Dual Memory Segmentation

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Solution Overview

Problem

Existing methods for correcting distorted aberrations in optical systems either lower the memory access rate when applied to burst access memory or require processing for address reconfiguration, and when applied to random access memory, they result in a decreased access rate.

Innovation Solution

A distorted aberration correction processing apparatus that utilizes a first memory area for burst access and a second memory area for random access, with address control circuits to read and write image signals sequentially and on a pixel basis, respectively, to suppress aberrations while maintaining memory access efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If address control is performed to read out pixel signals along a curve corresponding to distorted aberration from burst access memory, then distorted aberration correction is achieved, but memory access rate is lowered due to frequent discontinuous addresses

Engineering Contradiction:
Improvedistorted aberration correctionVSAvoidmemory access rate
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The memory system is segmented into two distinct memory areas: a first memory area optimized for burst access and a second memory area optimized for random access. This segmentation allows each memory area to be accessed in its optimal mode, resolving the contradiction between aberration correction and access rate.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second memory area acts as an intermediary buffer between the burst access memory and the output portion. Image signals are first transferred in bulk from the first memory area to the second memory area, then randomly accessed from the second memory area for correction. This intermediary structure enables both efficient bulk transfer and flexible random access.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If address reconfiguration or burst stop processing is required for distorted aberration correction in burst access memory, then aberration correction is achieved, but processing complexity increases

Engineering Contradiction:
Improvedistorted aberration correctionVSAvoidprocessing complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The processing system is segmented into two distinct memory areas with different access characteristics. The first memory area handles bulk data transfer without requiring address reconfiguration, while the second memory area handles the complex random access operations needed for aberration correction. This segmentation isolates the complexity to only where it is needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second memory area serves as an intermediary that absorbs the processing complexity of address reconfiguration and random access. By pre-transferring data to this intermediary area in a simple sequential manner, the complex aberration correction operations can be performed without repeatedly accessing and reconfiguring the main burst access memory.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If random access memory is used for distorted aberration correction, then access flexibility is improved, but access rate is decreased

Engineering Contradiction:
Improveaccess flexibilityVSAvoidaccess rate
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The memory system is divided into two segments: a burst access memory optimized for high-speed sequential access and a random access memory optimized for flexible addressing. This segmentation allows the system to leverage the high access rate of burst memory for bulk transfers while using the flexible addressing of random access memory for correction operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system merges the advantages of both burst access memory and random access memory by combining them in a dual-memory architecture. The first memory area provides high-speed bulk data transfer, while the second memory area provides flexible random access for aberration correction, achieving both high access rate and access flexibility simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8098954B2Distorted aberration correction processing apparatus
Publication Date: 2012.01.17 CANON KK
  • US8098954B2 patent drawing
  • US8098954B2 patent drawing
  • US8098954B2 patent drawing

AI summary

A distorted aberration correction processing apparatus includes DRAM and SRAM for storing an object image from an optical system. Further, the distorted aberration correction processing apparatus includes: a first address control circuit for reading out a pixel in the DRAM on a unit basis of an area including a plurality of the pixels along a curve corresponding to a distorted aberration of an optical system and writing the read-out pixel in SRAM; and a second address control circuit for reading out a pixel in the SRAM on a pixel basis and outputting the pixel read out on a pixel basis to an output portion so as to suppress the distorted aberration of the optical system. The first address control circuit effects control so that the signal of the areas is sequentially read out in a predetermined order, and the second address control circuit effects random access control.