Abstraction Layer for Multithreaded Core Scheduling

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Solution Overview

Problem

Current multi-core processor architectures, which treat each hardware thread as an independent CPU, face challenges in real-time scheduling and resource management, leading to inefficiencies and potential starvation of high-priority applications due to context switching and resource sharing among threads.

Innovation Solution

An abstraction layer is introduced to treat sibling hardware threads within a CPU core as a single logical CPU, allowing for coordinated scheduling and resource allocation, hiding hardware multithreading from user-space applications while enabling flexible utilization of multithreading for improved performance and correctness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If hardware multithreading is implemented to increase computational throughput, then productivity is improved, but real-time scheduling reliability deteriorates due to context switching between threads

Engineering Contradiction:
Improvecomputational throughputVSAvoidreal-time scheduling
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system segments hardware threads into different priority levels, with real-time threads isolated from non-real-time threads. This segmentation prevents context switching between real-time and non-real-time threads, ensuring real-time scheduling reliability while still allowing multithreading for non-real-time applications to maintain productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism (thread priority scheduler) that mediates between hardware threads of different priorities. This intermediary ensures that real-time threads are protected from preemption by non-real-time threads, resolving the contradiction between multithreading productivity and real-time scheduling reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If each hardware thread is treated as an independent CPU to simplify scheduling, then ease of operation is improved, but resource utilization efficiency deteriorates

Engineering Contradiction:
Improvescheduling simplicityVSAvoidresource utilization
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The system applies different scheduling policies to different hardware threads based on their priority level. Real-time threads receive guaranteed resource allocation while non-real-time threads share resources dynamically. This local quality differentiation simplifies scheduling decisions while maximizing resource utilization through coordinated thread execution.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The scheduling system dynamically adjusts resource allocation based on thread priority and system state. High-priority real-time threads receive immediate resource allocation when needed, while low-priority non-real-time threads utilize remaining resources. This dynamic approach maintains scheduling simplicity while optimizing resource utilization.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If hardware context switching is allowed between threads to improve multitasking, then adaptability is improved, but harmful factors increase due to starvation of high-priority applications

Engineering Contradiction:
Improvemultitasking capabilityVSAvoidapplication starvation
Core Design Contradiction:
Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The system implements preliminary anti-action by establishing priority-based protection mechanisms before context switching occurs. High-priority real-time threads are protected in advance from being preempted by low-priority threads, preventing starvation before it can occur while still allowing multitasking through coordinated scheduling.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The scheduler performs preliminary actions by pre-allocating time slices and resources to high-priority threads before executing context switches. This ensures that real-time applications receive guaranteed execution time while non-real-time applications execute in remaining time slots, enabling multitasking without causing starvation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9454389B2Abstracting a multithreaded processor core to a single threaded processor core
Publication Date: 2016.09.27 HEWLETT PACKARD ENTERPRISE DEV LP
  • US9454389B2 patent drawing
  • US9454389B2 patent drawing
  • US9454389B2 patent drawing

AI summary

An operating system provides instructions for execution by plural hardware threads of a multithreaded core of a processor, the plural hardware threads appearing as separate logical processors to the operating system. An abstraction layer converts respective identifiers of the plural hardware threads to a core identifier representing the core. The abstraction layer presents the core identifier to a user application to hide the plural hardware threads from the user application, and to present the core as a single-threaded core to the user application.