Single-Stage High-Speed Transmitter With AC-Coupled Read Termination
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current high-speed data link systems require multiple stages for level shifting and data transmission, which complicates the process and can lead to reflection issues during data reception.
Innovation Solution
A single-stage transmitter that operates in both write and read modes, capable of level shifting data from a low supply domain to a higher domain and configuring as a termination circuit to reduce reflection, utilizing NMOS and PMOS cross-coupled devices with AC coupling capacitors and cascode structures to achieve high-speed data transmission and impedance matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple stages are used for level shifting and data transmission, then data transmission capability is achieved, but device complexity increases and reflection issues occur during data reception
Solution Approach 1:
The patent combines level shifting and data transmission functions into a single integrated stage. The level shifter circuit directly outputs serialized data to the channel without requiring separate serialization and driving stages, thereby reducing device complexity while maintaining data transmission capability.
Solution Approach 2:
The single stage transmitter is designed to perform multiple functions simultaneously: level shifting from low supply domain to high supply domain, data serialization, and channel driving. This multi-functional design eliminates the need for multiple dedicated stages.
2Adaptability or versatility
If multiple stages are used for level shifting and data transmission, then voltage domain conversion is achieved, but device complexity and reflection issues increase
Solution Approach 1:
The patent merges the voltage domain conversion function with the data transmission function in a single stage. The level shifter circuit is designed to convert voltages from low supply domain to high supply domain while simultaneously preparing and outputting serialized data to the channel.
3Device complexity
If a single stage is used for level shifting and data transmission, then device complexity is reduced, but the ability to handle high-speed data transmission may be compromised
Solution Approach 1:
The patent employs dynamic circuit design techniques including clocked circuitry and timed signal transitions to achieve high-speed operation in a single stage. The level shifter and serializer are synchronized to operate at high frequencies, maintaining data transmission speed despite the reduced number of stages.
Data Source
AI summary
A single stage transmitter that operates at high speed is configured to operate as a driver in write mode and a termination in read mode. The driver configuration includes two circuits. The first circuit includes a PMOS cross-coupled device and a PMOS cascode circuit. The second circuit includes a NMOS cross-coupled device and a NMOS cascode circuit. The PMOS cross-coupled device and the NMOS cross-coupled device is connected in series by alternating current (AC) coupling capacitors. The termination configuration includes a third circuit including MOSFET transmission gates and an inverter controlled by a termination mode enable signal. In write mode, the third circuit of the single stage transmitter is turned off and the first and second circuits are operational. In read mode, the first and second circuits of the single stage transmitter are inactive and the third circuit is operational.