Protocol Stack Buffer Routing for AC-Specific Low-Latency Packets

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Solution Overview

Problem

Existing radio communication networks face challenges in achieving low latency and efficient data processing due to fronthaul limitations and lack of AC-specific latency considerations in the protocol stack, particularly in edge computing scenarios, leading to suboptimal performance for delay-sensitive applications.

Innovation Solution

Implementing a buffer-based processing method that separates AC-specific data packets from non-AC data packets in designated separate buffers, prioritizing AC-specific data processing at respective layers to reduce latency and enhance network performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If traditional integrated RAN systems process all data packets through the complete protocol stack, then processing completeness is maintained, but latency increases and network efficiency deteriorates for delay-sensitive applications

Engineering Contradiction:
ImprovelatencyVSAvoidnetwork efficiency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The protocol stack processing is segmented into two paths: a complete processing path for non-AC data packets and an accelerated path for AC-specific data packets. This segmentation allows AC-specific packets to skip certain processing stages, reducing latency while maintaining complete processing for other packets.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different processing qualities are applied to different data packets based on their AC-specific characteristics. AC-specific data packets receive prioritized processing with reduced latency, while non-AC packets receive standard complete processing, optimizing overall network efficiency for delay-sensitive applications.

Inventive Principle:
Principle #3Local quality

2Loss of time

If AC-specific data packets are processed with priority in separate buffers, then latency is reduced for delay-sensitive applications, but device complexity increases

Engineering Contradiction:
ImprovelatencyVSAvoidprocessing complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The processing system is segmented into separate buffer structures for AC-specific and non-AC data packets. This segmentation isolates the complexity of prioritized processing to only the AC-specific path, while maintaining standard processing for other packets, thus managing device complexity through structured separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the processing parameters (buffer assignment, processing priority, protocol stack depth) based on the AC-specific identification of data packets. This dynamic parameter adjustment enables latency reduction for AC packets without permanently increasing complexity for all packet processing paths.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If the complete protocol stack is implemented in traditional RAN systems, then processing reliability is maintained, but fronthaul limitations and lack of AC-specific considerations lead to suboptimal performance

Engineering Contradiction:
Improveprocessing reliabilityVSAvoidnetwork performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The protocol stack processing is segmented into complete and accelerated paths, with AC-specific packets routed through the accelerated path that maintains essential processing reliability while skipping non-critical stages. This segmentation preserves reliability for packets that need it while optimizing performance for AC-specific traffic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different processing qualities are applied locally to different packet types: AC-specific packets receive streamlined processing with prioritized handling, while other packets receive complete processing. This local quality differentiation maintains overall system reliability while achieving superior performance for delay-sensitive applications.

Inventive Principle:
Principle #3Local quality

Data Source

PatentEP4672726A1Processing of the network protocol stack
Publication Date: 2025.12.31 INTEL CORP
  • EP4672726A1 patent drawingFigure 1~2
  • EP4672726A1 patent drawingFigure 3~4
  • EP4672726A1 patent drawingFigure 5~6

AI summary

An apparatus of a communication device, the apparatus may include: a memory; and a processor configured to: receive a plurality of data packets at a layer of a network protocol stack; determine a result, wherein the result represents whether a data packet of the plurality of data packets belongs to an application client; provide instructions to cause the memory to store the data packet within either a first buffer or a second buffer based on the result; and process, at the layer of the network protocol stack, the plurality of data packets stored in the first buffer and the second buffer.