AC-Stack Intermediate Power Amplifier for High Gain Linearity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Power amplifier circuits in mobile communication devices face challenges in achieving low distortion and sufficient gain without increasing circuit size, particularly in multi-stage configurations where impedance matching and transistor configurations impact performance.
Innovation Solution
A power amplifier circuit with a three-stage configuration, including an input-stage, intermediate-stage, and output-stage power amplifier, where the intermediate-stage uses an AC stack configuration with two transistors and a capacitor to maintain operation without doubling the power supply voltage, even with increased load impedance, while maintaining linearity and reducing transistor area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a three-stage power amplifier configuration is used to ensure sufficient gain, then the gain is improved, but the circuit size increases
Solution Approach 1:
The patent merges the collector of the first transistor with the emitter of the second transistor in the intermediate-stage power amplifier, eliminating the need for an intermediate coupling component and reducing circuit area while maintaining the three-stage gain structure
Solution Approach 2:
The first transistor serves dual functions as both the output transistor of the intermediate stage and the input transistor of the drive stage, allowing a single transistor to perform multiple amplification functions and reducing the total transistor count
2Stability of the object's composition
If the intermediate-stage power amplifier uses an AC stack configuration with two transistors, then the linearity is improved, but the transistor area increases
Solution Approach 1:
The patent merges the collector of the first transistor with the emitter of the second transistor, allowing the AC stack configuration to achieve high linearity while reducing the overall transistor area by eliminating redundant components and optimizing the spatial arrangement
Solution Approach 2:
The patent changes the connection topology from a traditional series configuration to a merged collector-emitter configuration, effectively utilizing the vertical dimension of transistor stacking to reduce the horizontal area occupied by the circuit
3Power
If the load impedance is increased in the intermediate-stage power amplifier, then the gain is improved, but the power supply voltage requirement doubles
Solution Approach 1:
By merging the collector of the first transistor with the emitter of the second transistor, the patent enables the intermediate stage to drive higher load impedances without requiring doubled power supply voltage, as the merged configuration provides direct current path efficiency
Solution Approach 2:
The patent changes the impedance matching parameters by directly connecting the collector-emitter junction, allowing the circuit to operate with higher load impedance while maintaining the original power supply voltage level through optimized current flow
Data Source
AI summary
A power amplifier circuit includes an input-stage power amplifier configured to receive a radio-frequency input signal, an output-stage power amplifier configured to output an amplified radio-frequency output signal, and an intermediate-stage power amplifier disposed between the input-stage power amplifier and the output-stage power amplifier. The intermediate-stage power amplifier includes a first transistor, a second transistor, and a capacitor having a first end connected to an emitter of the first transistor and a second end connected to a collector of the second transistor. The intermediate-stage power amplifier receives a signal at a base of the second transistor thereof and outputs an amplified signal from a collector of the first transistor thereof.