Configurable Logic Circuits for Accelerated Sequencing Base Calling
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Solution Overview
Problem
Current sequencing technologies face a bottleneck in data processing, leading to delayed availability of sequence data due to the time-consuming processing of raw signal data using complex computational pipelines, which is particularly problematic in clinical applications where timely diagnosis is critical.
Innovation Solution
The implementation of configurable logic circuits, such as FPGAs, to perform raw signal processing, basecalling, and sequence determination operations, enabling accelerated processing and analysis of sequencing data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If complex computational pipelines are used to process raw signal data, then basecalling accuracy is improved, but processing time increases significantly
Solution Approach 1:
The patent divides the complex basecalling pipeline into separate functional modules: signal acquisition, signal processing, basecalling, and quality control. Each module can be independently optimized and processed in parallel, reducing overall processing time while maintaining accuracy through systematic validation at each stage
Solution Approach 2:
The patent implements preliminary signal processing steps including noise filtering, normalization, and artifact removal before basecalling. This pre-processing prepares the data in advance, enabling faster and more accurate basecalling without requiring complex real-time computations
2Productivity
If high throughput sequencing is implemented to increase data generation capacity, then productivity is improved, but data processing bottleneck worsens
Solution Approach 1:
The patent transitions from traditional CPU-based sequential processing to GPU-based parallel processing architecture. This dimensional change in computational approach enables thousands of sequencing reads to be processed simultaneously, matching the high throughput data generation capacity and eliminating the processing bottleneck
Solution Approach 2:
The patent implements continuous processing where signal data flows continuously through processing stages without interruption. Multiple sequencing reactions are processed in parallel continua, ensuring that data generation and data processing occur at matched rates, preventing bottlenecks while maintaining high throughput
Data Source
AI summary
Embodiments disclose methods, systems, and computer-readable media for accelerated base calling of sequencing data. These methods may be adapted to accelerate sequence determination for data arising from a variety of different nucleic acid sequencing platforms. In various embodiments, configurable logic circuits such as FPGAs and GPUs may be adapted to perform raw signal processing, basecalling, and/or sequence determination operations providing further enhancements to the sequence analysis methods.