Acceleration Interface Bitmap Task Queue for Heterogeneous Processor
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Solution Overview
Problem
Current heterogeneous processor systems face inefficiencies due to fixed system memory allocation for accelerator function units (AFUs) and the need for context switching between user and kernel modes, leading to resource wastage and unbalanced task distribution among multiple AFUs, which hampers performance in multi-user and multi-task environments.
Innovation Solution
A processing system with a core, AFUs, and an acceleration interface that utilizes task queues and bit maps to manage command packets, allowing for efficient dispatching and execution of tasks without frequent mode switching, and employs a round-robin method to balance task distribution across AFUs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the AFU is directly connected to the main bus and system memory, then the AFU can access system memory directly, but the amount of space in system memory available to the AFU is fixed and cannot be flexibly allocated
Solution Approach 1:
The patent introduces a memory management unit (MMU) as an intermediary between the AFU and system memory. The MMU manages memory allocation dynamically through page tables, allowing flexible allocation of memory space to different AFUs without requiring direct fixed connections. This resolves the contradiction by enabling both efficient access (through the intermediary) and flexible allocation (through page table management).
Solution Approach 2:
The patent changes the parameter of memory allocation from fixed to dynamic by implementing a virtual memory system with page tables. The page tables can be modified to allocate different amounts of memory space to different AFUs based on their needs, transforming the rigid memory allocation into a flexible system while maintaining efficient access through the virtual memory mechanism.
2Productivity
If tasks are copied from user space to kernel space for execution by AFU, then tasks can be executed by the accelerator, but context switch operations consume too many resources
Solution Approach 1:
The patent extracts the context switching operation from the task execution process by allowing AFUs to execute tasks directly in user space. The AFU retrieves task information and data directly from user space memory through the virtual memory system, eliminating the need to copy tasks to kernel space and perform context switches, thus removing this energy-consuming step while maintaining execution capability.
Solution Approach 2:
The virtual memory system acts as an intermediary that enables direct user space access for AFUs. Through page table mechanisms, the AFU can access user space memory directly without kernel space intervention, allowing task execution to bypass the traditional user-space-to-kernel-space copying process and reduce context switching overhead.
3Adaptability or versatility
If multiple AFUs are arranged in one chip to share acceleration tasks, then the AFU can serve multiple applications, but task distribution becomes unbalanced and performance cannot be fully utilized
Solution Approach 1:
The patent implements a feedback mechanism where the system continuously monitors the execution status and queue lengths of multiple AFUs. Based on this feedback information, the task scheduling algorithm dynamically adjusts task allocation to balance the workload across different AFUs, ensuring that no single AFU becomes a bottleneck while maximizing overall system utilization and performance.
Solution Approach 2:
The patent transforms the static task distribution into a dynamic system where task allocation continuously adapts based on current system state. The scheduling algorithm adjusts task routing in real-time according to AFU availability, queue depth, and execution progress, enabling balanced task distribution across multiple AFUs while maintaining the ability to serve multiple applications simultaneously.
Data Source
AI summary
A processing system includes at least one core, at least one accelerator function unit (AFU) and an acceleration interface. The unit runs a plurality of processes and develops at least one task queue corresponding to each of the processes. The core generates several command packets and pushes them into the corresponding task queue. The AFU are used to execute the command packets. The acceleration interface is arranged between the AFU and the core to receive an acceleration interface instruction from the processing core, and establish a bit map based on the acceleration interface instruction. The bit map is used to indicate which task queue contains the command packets that have been generated.