Process Accelerator Data Transfer Bypassing System Memory Staging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
General-purpose processors are inefficient for tasks requiring a large number of simple computations that can be performed in parallel, such as graphics acceleration or machine learning, and existing data transfer methods from non-volatile memory to process accelerators involve inefficient staging through system memory.
Innovation Solution
A method and apparatus that allows process accelerators to directly receive data from non-volatile memory by issuing transfer requests, bypassing staging memory, and manipulate the data to obtain the resource, including decompression, decryption, or tiling, using direct memory access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transferred from non-volatile memory to process accelerator through system memory staging, then data transfer can be performed using existing memory architecture, but data transfer efficiency deteriorates and latency increases
Solution Approach 1:
The patent extracts the data transfer path from the traditional NVM->system memory->process accelerator route and creates a direct NVM->process accelerator pathway. This removes the intermediate system memory staging step, eliminating the associated latency and bandwidth consumption while maintaining data transfer functionality.
Solution Approach 2:
The patent introduces a file system filter driver as an intermediary that enables direct memory access from NVM to process accelerator. This mediator component manages the transfer request, allocates buffer memory, and coordinates the direct transfer path without requiring data to reside in system memory staging areas.
2Speed
If process accelerators use local high bandwidth memory separate from system memory, then processing speed improves, but data transfer complexity increases due to multiple memory paths
Solution Approach 1:
The file system filter driver provides a universal interface that handles both traditional system memory transfers and direct NVM to process accelerator transfers. This single component manages multiple transfer paths and memory types, simplifying the overall system architecture despite the presence of multiple memory paths.
Solution Approach 2:
The patent segments the data transfer function into distinct components: the file system filter driver handles transfer request management, the NVM controller handles direct memory access, and the process accelerator handles local processing. This segmentation allows each component to specialize in its function while working together through well-defined interfaces.
3Productivity
If general-purpose processors are used for parallel computations, then system simplicity is maintained, but computational efficiency deteriorates for specialized tasks
Solution Approach 1:
The process accelerator serves itself by directly accessing NVM through the direct memory access pathway. The accelerator can initiate its own data transfer requests, manage its own buffer memory allocation, and perform computations independently without requiring general-purpose processor intervention for data movement, thereby improving computational efficiency for specialized tasks.
Data Source
AI summary
Methods and apparatuses for transferring data from non-volatile memory to process accelerator memory are disclosed. In one embodiment, a process accelerator issues a transfer request for a resource at a host file system. The process accelerator receives, responsive to the transfer request, data from the host file system, wherein the data corresponds to the resource and the process accelerator receives the data directly from the host file system bypassing staging memory of the host. The process accelerator manipulates the data to obtain the resource. Thus, the process accelerator may obtain the resource directly from the host file system to minimize the number of transfers of the data.