Accelerator Circuit Allocation for Reliability Without Standby Hardware

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing information processing apparatuses with accelerator devices face challenges in balancing reliability and action continuity, leading to potential degradation in reliability when failures occur, especially when switching between main and standby systems, and result in increased size and complexity.

Innovation Solution

An information processing apparatus with an allocation decision unit and reliability judgment unit that dynamically allocates diagnostic circuits based on failure influence degrees to maintain reliability and continuity, using units like GPUs and FPGAs to perform arithmetic operations and diagnose failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a standby system is maintained for each node in the machine learning model to ensure reliability, then reliability is improved, but the accelerator apparatus becomes large-sized and cannot satisfy required specifications

Engineering Contradiction:
ImprovereliabilityVSAvoidsize of accelerator apparatus
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

Processing circuits are allocated multiple roles: they serve as arithmetic circuits for normal operations and as diagnostic circuits for failure detection. The allocation decision unit dynamically assigns processing circuits to diagnostic functions based on failure influence degrees, allowing the same hardware resources to fulfill both computational and reliability assurance functions, thereby avoiding the need for separate standby systems

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The accelerator apparatus performs self-diagnosis by using its own processing circuits to monitor and detect failures in other processing circuits. The diagnostic circuits execute arithmetic operations on the arithmetic operation target and compare results to detect failures, enabling the system to self-monitor and self-diagnose without requiring external standby systems

Inventive Principle:
Principle #25Self-service

2Reliability

If diagnostic circuits are allocated to all arithmetic operation elements, then reliability is improved, but device complexity increases

Engineering Contradiction:
ImprovereliabilityVSAvoidcomplexity of accelerator apparatus
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Diagnostic circuits are not uniformly allocated to all arithmetic operation elements, but are selectively allocated based on the failure influence degree of each element. The allocation decision unit calculates the failure influence degree for each arithmetic operation element and allocates diagnostic circuits only to those elements where failures would have significant impact on the overall output accuracy, thereby reducing unnecessary complexity while maintaining reliability where it matters most

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system dynamically changes the allocation state of processing circuits between arithmetic circuit mode and diagnostic circuit mode based on operational needs and failure risk assessment. The allocation decision unit adjusts the number and position of diagnostic circuits according to the calculated failure influence degrees, transforming the static system architecture into a dynamic, adaptive configuration that optimizes both reliability and complexity

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12505020B2Information processing device and information processing method using accelerator device
Publication Date: 2025.12.23 HITACHI LTD
  • US12505020B2 patent drawing
  • US12505020B2 patent drawing
  • US12505020B2 patent drawing

AI summary

An arithmetic operation target is input to an information processing apparatus which causes an accelerator apparatus to perform an arithmetic operation using the arithmetic operation target. The information processing apparatus performs, regarding each of a plurality of arithmetic operation elements of the arithmetic operation target, whether to allocate one or more diagnostic circuits, which are available processing circuits for an accuracy diagnosis of the arithmetic operation from a plurality of processing circuits in the accelerator apparatus to the arithmetic operation element on the basis of a failure influence degree. The reliability of the information processing apparatus that is used to judge whether or not to continue an action(s) of the information processing apparatus is calculated on the basis of the number of arithmetic operation elements of the arithmetic operation target, the number of arithmetic operation elements to which at least one diagnostic circuit is allocated, and the failure influence degree.