Hardware Accelerator Clock Frequency Control for Neural Network Power Management
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Solution Overview
Problem
Existing hardware accelerators for multi-layer neural networks often operate at suboptimal clock frequencies due to conservative throttling, which reduces performance and increases the risk of overheating, especially in computationally demanding AI applications like video surveillance, where accurate and balanced criteria for clock frequency determination are lacking.
Innovation Solution
A method that measures power consumption during predefined operations on the hardware accelerator and evaluates power management criteria to dynamically adjust the clock frequency, ensuring safe operation without significant performance loss, by reducing the frequency only when necessary and allowing for further measurements at lower frequencies to confirm compliance with power management criteria.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the clock frequency is set to the recommended conservative value, then the chip operates safely without overheating, but the processing speed and performance are reduced
Solution Approach 1:
The system dynamically adjusts the clock frequency based on actual power consumption measurements and thermal conditions. Instead of using a fixed conservative frequency, the hardware accelerator can operate at higher frequencies when thermal headroom is available and reduce frequency only when necessary, making the operating point adaptive rather than static.
Solution Approach 2:
The system implements feedback by measuring actual power consumption during operation and using this information to adjust the clock frequency. Power consumption is monitored and fed back to the frequency control mechanism, enabling closed-loop control that balances performance and thermal safety based on real-time conditions.
2Productivity
If the clock frequency is increased to improve performance, then the processing speed increases, but the chip may overheat and cause erroneous output or permanent damage
Solution Approach 1:
Power consumption is continuously measured and fed back to the frequency control system. When power consumption approaches limits that would cause overheating, the system automatically reduces the clock frequency to prevent thermal damage, creating a self-regulating mechanism.
Solution Approach 2:
The system changes the operating parameters (clock frequency) based on measured power consumption. By adjusting the frequency parameter dynamically, the system can operate at high speeds when safe and reduce speed when thermal limits are approached, optimizing performance while preventing overheating.
3Reliability
If a fixed recommended clock frequency is used, then the chip operates continuously without overheating, but the user experience and responsiveness are degraded
Solution Approach 1:
The system transitions from static frequency setting to dynamic frequency adjustment. The clock frequency adapts to actual workload and thermal conditions, providing high performance when possible while maintaining reliable operation, thereby improving user experience without sacrificing continuous operation capability.
Solution Approach 2:
The system performs self-monitoring of power consumption and self-adjustment of clock frequency without external intervention. The hardware accelerator autonomously manages its own thermal safety and performance optimization, eliminating the need for conservative fixed-frequency throttling while maintaining reliable operation.
4Object-affected harmful factors
If conservative frequency throttling is applied, then the risk of overheating is reduced, but the number of useful operations per unit time decreases
Solution Approach 1:
The system uses feedback from power consumption measurements to dynamically control the clock frequency. Instead of applying conservative throttling by default, the system operates at high frequency and only reduces speed when power consumption indicates approaching thermal limits, maximizing operations per unit time while controlling overheating risk.
Solution Approach 2:
The clock frequency parameter is changed dynamically based on measured power consumption rather than being fixed at a conservative value. This allows the system to achieve high productivity when thermal conditions permit while still preventing overheating when power consumption becomes excessive.
Data Source
AI summary
A method of operating a hardware accelerator comprises: implementing a multi-layer neural network using the hardware accelerator; measuring a power consumption of the hardware accelerator while executing a predefined operation on the multi-layer network at a default clock frequency; evaluating one or more power management criteria for the measured power consumption; and, in response to exceeding one of the power management criteria, deciding to reduce the clock frequency relative to the default clock frequency. In the step of measuring a power consumption of the hardware accelerator, per-layer measurements which each relate to fewer than all layers of the neural network may be captured.