Accelerator Clock Gating and Scaling from Runtime Task Graphs

The patent implements dynamic clock frequency adjustment by monitoring workload characteristics and adapting the clock rate of accelerator regions in real-time. When workloads are light or regions are idle, the clock frequency is reduced or gating is applied; when workloads are heavy, the clock frequency is increased. This dynamic adaptation resolves the contradiction by making the system flexible rather than fixed, allowing it to optimize between speed and power consumption based on actual runtime conditions.

The system changes the operational parameters of the accelerator device by adjusting clock frequency and enabling/disabling clock gating based on workload analysis. The runtime environment monitors task graphs and workload characteristics, then modifies the clock rate parameter dynamically. This parameter change approach allows the system to achieve high processing speeds when needed while reducing power consumption during low-utilization periods, directly addressing the technical contradiction.

The patent divides the accelerator device into multiple independent regions, each capable of having its own clock frequency and gating settings. The runtime environment can selectively apply clock gating or frequency scaling to specific regions based on their individual workload characteristics, while other regions continue operating at full performance. This segmentation allows the system to optimize power efficiency in idle regions without impacting the throughput of active regions, resolving the contradiction between power efficiency and processing throughput.

Different regions of the accelerator device are assigned different operational characteristics based on their specific workload requirements. Some regions may operate at high clock rates with full performance when handling computationally intensive tasks, while other regions operate at lower clock rates or with clock gating enabled when handling lighter workloads. This local quality approach ensures that power efficiency optimizations in one region do not degrade the throughput performance of other regions with different performance requirements.

The runtime environment implements a feedback mechanism that continuously monitors workload characteristics, task graph information, and performance metrics from multiple tenants. Based on this feedback, the system dynamically adjusts clock frequency and gating settings for different accelerator regions assigned to different tenants. This feedback loop allows the system to maintain performance consistency for each tenant while optimizing overall power efficiency across the multi-tenant environment, resolving the contradiction by using information from the feedback to make intelligent scheduling decisions.

The accelerator device is designed to support multiple tenants with diverse workload requirements simultaneously. The runtime environment provides a universal management layer that can handle different tenant workloads, apply appropriate clock gating and frequency scaling policies, and ensure performance isolation between tenants. This multi-functionality allows the system to serve multiple purposes - maintaining performance consistency for each tenant while achieving power efficiency at the system level through coordinated resource management.