Hardware Accelerator Control Block for Multi-Mode Encryption
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Solution Overview
Problem
Existing hardware accelerators in electronic devices like set-top boxes and mobile phones are limited to implementing only a few standard encryption/decryption modes, requiring software execution for new modes, which reduces the benefits of separate hardware blocks and increases processing time.
Innovation Solution
A hardware accelerator with a control block that can store and execute multiple encryption/decryption modes, including new ones, by loading instructions and selecting modes dynamically, allowing it to operate beyond standard modes like CBC and Counter Mode, using a combination of AES block ciphers and arithmetic logic units for efficient data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If hardware accelerators are designed to implement only standard modes of operation, then device complexity is reduced and manufacturing is easier, but adaptability to new encryption modes is lost and processing time increases when new modes are required
Solution Approach 1:
The hardware accelerator is designed with a universal control block that can store and execute multiple encryption/decryption modes including standard modes (CBC, Counter Mode) and new modes (CCM, CBC-MAC). The control block functions as a programmable unit that loads mode-specific instructions from memory, enabling the same hardware structure to perform diverse cryptographic operations without requiring separate dedicated circuits for each mode.
2Productivity
If new encryption modes are executed by the main processor CPU, then adaptability is maintained, but processing time increases and the benefit of separate hardware blocks is reduced
Solution Approach 1:
The hardware accelerator's control block is designed to autonomously manage multiple encryption modes by loading appropriate instructions from memory and executing them independently. The control block contains internal logic to handle mode selection, initialization vector management, and block processing without requiring intervention from the main CPU, thereby maintaining high processing speed while supporting both standard and new encryption modes.
3Ease of manufacture
If hardware accelerators use fixed functionality for standard modes, then ease of manufacture is improved, but loss of information occurs when new modes are required as they must be executed in software
Solution Approach 1:
The hardware accelerator incorporates a dynamic control block that can adapt its operation based on the loaded instructions. The control block includes programmable logic that changes its behavior according to the encryption mode being executed, allowing the hardware to transition from fixed-functionality to dynamic multi-functionality. This enables the accelerator to support new encryption modes through software-loaded instructions while maintaining ease of manufacturing through standardized hardware architecture.
Data Source
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AI summary
An encoding/decoding apparatus comprises a central processing unit and an encryption/decryption accelerator coupled to the central processing unit The accelerator comprises an input for input data to be encrypted/decrypted, an arithmetic logic unit coupled to said input for performing selectable operations on data obtained from said input data and an output for encrypted/decrypted data coupled to said arithmetic logic unit.