Accelerator Control Packets for SmartNIC Flow Cache Management
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Solution Overview
Problem
Existing network virtualization devices, such as smartNICs, face challenges in efficiently coordinating management of flows between their data plane and programming data plane, leading to suboptimal processing efficiency due to inefficient communication of control information and resource bottlenecks.
Innovation Solution
The implementation of a method where the accelerator generates a control packet with flow information formatted similarly to data packets, transmitted via the same optimized data bus used for data packets, allowing the programming data plane to instruct the accelerator to remove cache entries, thereby optimizing flow management and reducing resource bottlenecks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If control information is communicated using traditional methods between data plane and programming data plane, then coordination can be achieved, but processing efficiency decreases due to resource bottlenecks
Solution Approach 1:
The patent merges control packet transmission with the existing data packet forwarding path. The accelerator formats control information as control packets that traverse the same optimized data bus and processing path used for data packets, eliminating separate control communication channels and reducing coordination complexity while maintaining high processing efficiency
Solution Approach 2:
The data bus and packet processing path are designed to handle both data packets and control packets universally. The same hardware components and processing logic used for data forwarding also process control information, making the system multi-functional and eliminating resource bottlenecks associated with dedicated control communication paths
2Reliability
If separate communication paths are used for control information, then coordination between planes is achieved, but resource bottlenecks increase
Solution Approach 1:
The patent combines control information transmission with the existing high-speed data packet forwarding path. Control packets are processed alongside data packets using the same optimized hardware resources and communication bus, eliminating the resource bottlenecks that would arise from separate dedicated control communication paths while maintaining reliable flow management coordination
3Loss of information
If control packets use different header format than data packets, then control information can be transmitted, but processing efficiency decreases due to additional formatting overhead
Solution Approach 1:
The patent applies local quality by making control packets a specialized subset of data packets with identical header formats. Control information is embedded within the existing data packet structure, allowing the same processing logic to handle both data and control packets without additional formatting overhead, thus maintaining high processing speed while ensuring accurate control information transmission
Solution Approach 2:
The packet processing system is designed to universally handle both data packets and control packets using the same header format and processing logic. This multi-functionality eliminates the need for separate control packet formatting operations, reducing processing overhead and maintaining high throughput while ensuring reliable control information delivery
Data Source
AI summary
Techniques are disclosed for utilizing control packets to manage flows. In one example, an accelerator determines that a cache entry is a candidate for removal, the accelerator being responsible for forwarding packets associated with a particular flow based at least in part on a flow state. The accelerator generates an instruction to remove a cache entry of the particular flow from a cache based at least in part on receiving the determination that the cache entry is the candidate for removal. The accelerator removes the cache entry from the cache based at least in part on the instruction. The accelerator generates a control packet that includes a flow information associated with the particular flow being formatted utilizing a particular header format. The accelerator transmits the control packet to a programming data plane utilizing a path based at least in part on the control packet utilizing the particular header format.