Accelerator DMA Transfer Using Descriptor-Based Memory Allocation

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Solution Overview

Problem

Existing direct memory access (DMA) transmission methods in scenarios like network and image transmission result in resource waste due to unpredictable data amounts, leading to inefficient memory allocation and CPU performance requirements.

Innovation Solution

An accelerator device receives and processes data packets, records storage information, and writes it into descriptors for the host to apply memory accordingly, initiating DMA transmission without pre-allocating large memory spaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If adequate memory space is applied for in advance on the host side, then data packet dropouts are prevented, but resource waste occurs due to unpredictable data transmission amounts

Engineering Contradiction:
Improvedata packet transmission reliabilityVSAvoidmemory resource waste
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The accelerator device performs preliminary actions by pre-processing data packets and storing them in its own storage device before host memory allocation. The storage information (size and address) is recorded and written into descriptors in advance, enabling the host to allocate memory efficiently based on actual data requirements rather than over-allocating in advance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The accelerator device acts as an intermediary between data sources and host memory. It receives data packets, stores them temporarily in its own storage device, and provides storage information to the host through descriptors. This intermediary role allows the host to allocate memory precisely based on actual data size without over-provisioning.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Duration of action of stationary object

If large memory space is pre-allocated on the host side, then data transmission continuity is ensured, but CPU performance requirements increase and embedded platforms with limited memory experience abnormalities

Engineering Contradiction:
Improvedata transmission continuityVSAvoidCPU performance requirement and memory management complexity
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The system segments memory management responsibilities between the accelerator device and host. The accelerator device handles data reception, pre-processing, and temporary storage, while the host only needs to allocate memory based on descriptors containing actual data size information. This segmentation reduces the host's memory management burden and CPU performance requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The accelerator device serves itself by performing pre-processing and storing data packets in its own storage device without requiring host intervention. It then provides storage information to the host through descriptors, enabling the host to allocate memory efficiently without complex management overhead.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If memory is allocated based on maximum predicted data amount, then all possible data packets can be accommodated, but embedded platforms with limited memory resources experience functional abnormalities

Engineering Contradiction:
Improvedata transmission capacityVSAvoidavailable memory for other functions
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The system implements dynamic memory allocation where the host allocates memory based on actual data packet sizes provided in descriptors, rather than static pre-allocation based on maximum predicted amounts. This dynamic approach allows embedded platforms to allocate only the necessary memory for current data transmission tasks, leaving sufficient memory for other functions.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260111377A1Method and apparatus of transmitting data, accelerator device and host
Publication Date: 2026.04.23 INSPUR SUZHOU INTELLIGENT TECH CO LTD
  • US20260111377A1 patent drawing
  • US20260111377A1 patent drawing
  • US20260111377A1 patent drawing

AI summary

Provided are a method of transmitting data and apparatus, an accelerator device, a host, and a non-volatile readable storage medium. The method includes: receiving, by an accelerator device, an application data packet and storing the application data packet into a storage device; recording storage information of the application data packet. The storage information includes a size of the application data packet and a storage address of the application data packet in the storage device; writing the storage information of the application data packet into a descriptor, such that a host applies for memory according to the storage information in descriptor and fills an address of the memory applied into the descriptor to initiate direct memory access transmission; and transmitting, through the direct memory access transmission, the application data packet in the storage device to the host.