Accelerator Output Stage With Load-Dependent Drive Duration
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Solution Overview
Problem
Existing bidirectional level translator circuits face a trade-off between switching frequency, load driving capability, and signal integrity due to the use of one-shot drivers with fixed pulse widths, limiting their ability to handle varying capacitive loads effectively.
Innovation Solution
The accelerator output stage circuit dynamically adjusts the drive duration based on output loading by incorporating high and low side one-shot devices, logic gates, and feedback mechanisms, allowing the drive duration to be determined by the capacitive load, thereby optimizing switching frequency and signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the duration of the accelerator drive is set longer to allow driving heavier capacitive loads, then the maximum capacitive load driving capability is improved, but the maximum switching frequency decreases
Solution Approach 1:
The patent implements dynamic adjustment of the accelerator drive pulse width based on the actual capacitive load detected by the feedback device. The one-shot device generates a base pulse width that is dynamically modified by the feedback mechanism to match the specific load requirements, allowing the system to optimize between load driving capability and switching frequency on a per-transition basis rather than being constrained by a fixed pulse width
2Productivity
If the duration of the accelerator drive is set shorter to increase maximum switching frequency, then the maximum switching frequency is improved, but the maximum bus capacitance that can be driven rail-to-rail is limited
Solution Approach 1:
The patent employs a feedback device that monitors the actual output transition and provides feedback signals to adjust the accelerator drive duration in real-time. This feedback mechanism allows the system to extend the drive pulse width when heavy capacitive loads are detected, ensuring complete rail-to-rail transitions while maintaining high switching frequencies for lighter loads
3Quantity of substance
If some contention is allowed between upper and lower drivers to increase load driving capability, then the maximum bus capacitance driving capability is improved, but dynamic ICC current increases
Solution Approach 1:
The patent uses the accelerator output stage to provide preliminary action by pre-charging or pre-discharging the capacitive load before the main driver switches. This preliminary action reduces the amount of current needed during the actual switching transition, minimizing contention current while still achieving complete rail-to-rail voltage transitions on heavy capacitive loads
Data Source
AI summary
The accelerator output stage circuit includes: a high side output device coupled to an output node; a low side output device coupled to the output node; a first logic gate coupled to a control node of the first high side output device; a second logic gate coupled to a control node of the second high side output device; a high side one-shot device having an output coupled to a first input of the first logic gate; a low side one-shot device having an output coupled to a first input of the second logic gate; and a feedback device coupled between the output node and a second input of the first logic gate, and between the output node and a second input of the second logic gate, and between the output node and the input to the high side resistor bypass device, and between the output node and the input to the low side one-shot resistor bypass device.

