Hardware Accelerator Pooling and Argmax Circuitry

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Solution Overview

Problem

Neural network accelerators (NNAs) face inefficiencies in performing argmax/argmin functions, pooling, unpooling, and backward pooling operations due to limited functionality and resource utilization, with dedicated hardware modules being inefficient and general-purpose software solutions being slow due to memory access overhead.

Innovation Solution

Repurpose existing fixed-function circuitry in NNAs to perform these operations using elementary neural network operations such as element-wise subtraction, multiplication, maximum, minimum, pooling, and lookup table operations, allowing for efficient execution within the hardware accelerator without the need for additional hardware or off-chip processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If dedicated hardware modules are added to perform argmax/argmin and pooling operations, then operational speed is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improveoperational speedVSAvoiddevice complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent makes existing fixed-function circuitry (convolution engines, element-wise operation units, pooling units) perform multiple functions including argmax/argmin and pooling operations. The convolution engines can execute element-wise comparisons to find maximum/minimum values and their indices, while the pooling unit can perform both traditional pooling and unpooling operations using the same hardware resources.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines argmax/argmin functionality with existing neural network operations by integrating index tracking into the convolution and pooling processes. The element-wise operation unit performs both arithmetic operations and comparison operations using the same circuitry, and the pooling unit combines value aggregation with index recording in a single operational pass.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If general-purpose software solutions are used for argmax/argmin operations, then device complexity is reduced, but processing speed decreases due to memory access overhead

Engineering Contradiction:
Improvedevice complexityVSAvoidprocessing speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent enables the neural network accelerator to perform argmax/argmin operations autonomously using its existing fixed-function circuitry without requiring external general-purpose processors. The element-wise operation unit and pooling unit self-serve by performing comparison and index tracking operations as part of their native neural network processing functions, eliminating the need to offload these operations to slower software implementations.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If existing fixed-function circuitry is repurposed for argmax/argmin operations, then resource utilization improves, but the circuitry must be flexibly configured for different operations

Engineering Contradiction:
Improveresource utilizationVSAvoidconfiguration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces dynamic configuration capabilities to the fixed-function circuitry through programmable control mechanisms. The element-wise operation unit can be dynamically programmed to perform different operations (addition, multiplication, comparison) based on operational requirements. The pooling unit can be configured to perform max pooling, min pooling, or unpooling operations by changing control parameters rather than requiring physical reconfiguration.

Inventive Principle:
Principle #15Dynamics

4Adaptability or versatility

If pooling operations are implemented with full functionality (including unpooling and backward pooling), then neural network process completeness is improved, but hardware resource demands increase

Engineering Contradiction:
Improveneural network process completenessVSAvoidhardware resources
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent makes the pooling unit a multi-functional resource that can perform forward pooling, backward pooling, and unpooling operations using the same hardware circuitry. The element-wise operation unit serves dual purposes by performing both arithmetic computations and the comparison operations needed for argmax/argmin and gradient computations during backward propagation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges gradient computation with the existing pooling operation by having the pooling unit simultaneously aggregate values and track indices needed for both forward and backward passes. The element-wise operation unit combines comparison operations with arithmetic operations in unified computational pipelines, reducing the need for separate dedicated hardware for each function.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20230019151A1Implementation of pooling and unpooling or reverse pooling in hardware
Publication Date: 2023.01.19 IMAGINATION TECH LTD
  • US20230019151A1 patent drawing
  • US20230019151A1 patent drawing
  • US20230019151A1 patent drawing

AI summary

A mechanism for processing, on a hardware accelerator comprising fixed-function circuitry, data according to a neural network process that includes a pooling, unpooling or backward pooling and/or binary argmax/argmin function. The function is mapped to a set of elementary neural network operations available to the fixed-function circuitry. The neural network process is then executed using the fixed-function circuitry. The data processed using the neural network process comprises image and/or audio data.