Heterogeneous Accelerator Switching for SoC Performance

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Solution Overview

Problem

Data processing systems face challenges in efficiently selecting between hardware and software accelerators for multimedia processing, as hardware accelerators increase manufacturing costs while software accelerators compromise on operating speed and response time under heavy loads.

Innovation Solution

A system-on-chip (SoC) that dynamically switches between hardware and software accelerators based on CPU usage thresholds, using an accelerator controller module to compare current CPU usage with threshold values and switch between accelerators to optimize performance and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a hardware accelerator is used to accelerate multimedia processing, then processing speed is improved, but manufacturing cost increases due to requiring separate hardware

Engineering Contradiction:
Improveprocessing speedVSAvoidmanufacturing cost
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The system dynamically switches between hardware accelerator and software accelerator based on real-time CPU usage monitoring. When CPU usage is low, the hardware accelerator is activated for high-speed processing. When CPU usage is high, the system switches to software accelerator to avoid additional hardware cost, thus adapting the acceleration method to current system conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the acceleration implementation method based on CPU usage parameter thresholds. By monitoring CPU usage and comparing it against predetermined thresholds, the system switches between hardware and software acceleration modes, allowing flexible adaptation to different operating conditions without fixed hardware requirements

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If a software accelerator is used to avoid hardware cost, then manufacturing cost is reduced, but operating speed and response speed decrease under large load

Engineering Contradiction:
Improvemanufacturing costVSAvoidoperating speed
Core Design Contradiction:
Ease of manufactureVSSpeed

Solution Approach 1:

The system dynamically selects the acceleration method based on real-time CPU usage monitoring. Under light to moderate load, software accelerator is used to keep manufacturing cost low. When CPU usage exceeds the threshold indicating heavy load, the system switches to hardware accelerator to maintain processing speed, thus adapting performance characteristics to workload conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system continuously monitors CPU usage and uses this feedback to determine when to switch between software and hardware accelerators. The feedback loop ensures that the acceleration method is always optimized for current system conditions, maintaining both cost-effectiveness and performance

Inventive Principle:
Principle #23Feedback

3Productivity

If the hardware accelerator is always used for acceleration, then processing speed is maximized, but device complexity increases due to requiring separate hardware devices

Engineering Contradiction:
Improveprocessing speedVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The CPU serves multiple functions: it executes application programs, monitors its own usage state, and decides whether to activate hardware or software acceleration. This multi-functionality eliminates the need for a separate dedicated acceleration controller, reducing system complexity while maintaining the ability to provide hardware acceleration when needed

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system dynamically activates or deactivates hardware acceleration based on CPU usage conditions. Rather than always having hardware accelerator hardware present and active, the system only activates it when CPU usage is low, reducing the effective complexity of the system under typical operating conditions while maintaining high performance capability when required

Inventive Principle:
Principle #15Dynamics

4Device complexity

If the software accelerator is always used, then device complexity is reduced, but processing speed decreases under heavy CPU load

Engineering Contradiction:
Improvehardware complexityVSAvoidprocessing speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The system dynamically switches between software and hardware acceleration modes based on real-time CPU usage monitoring. When CPU usage is low, software accelerator is used to minimize complexity. When CPU usage exceeds the threshold, hardware accelerator is activated to maintain processing speed, thus adapting the balance between complexity and performance to current workload conditions

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9223581B2Data processing system and method for switching between heterogeneous accelerators
Publication Date: 2015.12.29 SAMSUNG ELECTRONICS CO LTD
  • US9223581B2 patent drawing
  • US9223581B2 patent drawing
  • US9223581B2 patent drawing

AI summary

A method for operating a system on chip includes receiving an acceleration request signal generated upon execution of an application program, in response to receipt of the acceleration request signal, comparing a current usage of a central processing unit (CPU) with a threshold value to generate a comparison signal, and performing switching between heterogeneous accelerators to accelerate a function executed by the application program in response to the comparison signal.