Accelerator System Offloading Data Processing from Host Resources

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Solution Overview

Problem

Standard microprocessors lack circuitry for certain algorithms, and data transactions associated with algorithms burden host system resources, particularly when handling remote data storage and networking, leading to a desire for an accelerator system to offload these tasks.

Innovation Solution

An accelerator system is coupled with a bus and includes an application function block for secure data parsing, using a Programmable Logic Device to process data and store it locally, reducing the load on motherboard system resources by converting system payload pointers into local payload pointers for memory access and transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data transactions are handled by motherboard system resources (CPU, system memory, Northbridge, Southbridge), then data processing can be performed, but the operation of the host system is burdened

Engineering Contradiction:
Improvedata transaction processing capabilityVSAvoidhost system resource burden
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts data transaction handling functions from the motherboard system resources and relocates them to a dedicated network interface card (NIC) with onboard memory and processing capability. This separation allows the host system to offload data transaction burdens while the NIC independently manages data parsing, encryption, and transmission to remote storage, thereby improving productivity without burdening the host system.

Inventive Principle:
Principle #2Taking out (Extraction)

2Speed

If an accelerator system using FPGA is used to provide algorithm circuitry, then execution speed of algorithms is significantly accelerated, but data transactions still burden system resources

Engineering Contradiction:
Improvealgorithm execution speedVSAvoidsystem resource burden for data transactions
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent merges the accelerator's algorithm processing capability with a dedicated network interface and remote storage access functionality into an integrated system. The FPGA accelerator processes data locally, and the integrated network interface directly transmits processed data to remote storage without involving motherboard system resources. This combination maintains high-speed algorithm execution while eliminating the burden on system resources for data transactions.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If data is stored remotely using cloud computing resources over a network, then remote storage is achieved, but data handling via network interface burdens motherboard system resources

Engineering Contradiction:
Improveremote storage capabilityVSAvoidhost system resource burden
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements self-service by enabling the network interface card to autonomously handle data transactions for remote storage without requiring host system intervention. The NIC includes onboard memory for buffering data and integrated processing logic for encryption and protocol handling. This allows the NIC to independently manage the complete data transaction lifecycle from the accelerator to remote cloud storage, achieving versatile remote storage capability while keeping the host system unburdened.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9411524B2Accelerator system for use with secure data storage
Publication Date: 2016.08.09 SECURITY FIRST INNOVATIONS LLC
  • US9411524B2 patent drawing
  • US9411524B2 patent drawing
  • US9411524B2 patent drawing

AI summary

Data processing and an accelerator system therefore are described. An embodiment relates generally to a data processing system. In such an embodiment, a bus and an accelerator are coupled to one another. The accelerator has an application function block. The application function block is to process data to provide processed data to storage. A network interface is coupled to obtain the processed data from the storage for transmission.