Accelerator VM Live Migration Using Parallel DMA State Transfer
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Solution Overview
Problem
Existing virtual machine migration technologies face challenges in efficiently transferring large amounts of state information, particularly for accelerators like GPUs, leading to noticeable performance drops during live migrations.
Innovation Solution
Utilizing direct memory access (DMA) operations by accelerators to store and restore state information in shared memory pages, parallelizing CPU and GPU operations to reduce latency and minimize the stop-and-copy phase duration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional CPU-based memory transfer is used to migrate accelerator state information, then the migration process is simple to implement, but the transfer speed is slow and latency is high
Solution Approach 1:
The accelerator performs self-transfer of its state information to the destination host without requiring CPU intervention. The accelerator autonomously reads its state from local memory and writes it to the destination host's memory, eliminating the CPU bottleneck while maintaining implementation simplicity through accelerator-driven operation
Solution Approach 2:
The patent replaces the traditional CPU-mediated mechanical memory transfer process with a direct accelerator-to-host memory transfer mechanism. This substitution eliminates the CPU involvement in the actual data transfer, significantly improving speed while the complexity is managed through hardware-level optimization rather than software complexity
2Reliability
If the stop-and-copy phase is used to ensure data consistency during migration, then data integrity is maintained, but the migration duration increases and performance drops
Solution Approach 1:
The accelerator completes its state transfer to the destination host before the actual VM migration stop-and-copy phase begins. This preliminary action ensures that when the VM is stopped for copying, all accelerator state data is already available at the destination, eliminating the need to wait for state transfer during the critical consistency window and reducing overall migration duration
Solution Approach 2:
The accelerator state transfer operation continues in the background during the VM's operational period, overlapping with other VM tasks. This continuous background transfer ensures data consistency is prepared beforehand while the VM remains running, avoiding the performance drop that would result from stopping the VM for state transfer
3Quantity of substance
If large amounts of state information are transferred during migration, then complete VM state is migrated, but the transfer time increases and bandwidth requirements increase
Solution Approach 1:
The accelerator autonomously manages its own state information transfer, directly reading from its local memory and writing to the destination host's memory without CPU mediation. This self-service approach maximizes transfer bandwidth and minimizes transfer time for large state datasets by eliminating CPU overhead and utilizing the accelerator's optimized memory interfaces
Solution Approach 2:
The patent substitutes the CPU-based sequential memory transfer mechanism with a direct accelerator-driven parallel transfer system. This replacement enables high-speed transfer of large state information volumes by utilizing the accelerator's dedicated memory bandwidth and avoiding the CPU's memory bus bottleneck, significantly reducing transfer time for large datasets
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Significantly reduces the latency and duration of virtual machine migrations by maximizing bandwidth usage and minimizing CPU load, ensuring minimal performance impact on applications.
Implementation Method 1
the accelerator then performs a direct memory access (DMA) operation to save the first state information in the first migration buffer
Data Source
AI summary
A source host computer including a central processing unit (CPU), an accelerator, and memory, is configured to migrate a virtual machine (VM) that uses the accelerator to a destination host computer, by performing the steps of: requesting a driver of the accelerator to save first state information associated with the VM in a first migration buffer of the memory that is accessible to both the CPU and the accelerator, wherein the accelerator then performs a direct memory access (DMA) operation to save the first state information in the first migration buffer; extracting, using the CPU, the first state information from the first migration buffer; and transmitting the extracted first state information to the destination host computer.


