Accelerator VM Live Migration Using Parallel DMA Buffers

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing virtualized computer systems face challenges in efficiently migrating large amounts of state information for virtual machines (VMs) using accelerators during live migrations, leading to noticeable performance drops due to latency and inefficient data transfer.

Innovation Solution

Implementing direct memory access (DMA) operations by accelerators to store and restore state information in shared memory pages, parallelizing CPU and GPU operations to reduce load on CPUs, and utilizing high-speed network connections for efficient data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If traditional CPU-based data transfer methods are used to migrate state information during live migration, then the migration process is simpler to implement, but the migration latency increases and application performance noticeably drops

Engineering Contradiction:
Improvemigration latencyVSAvoiddata transfer mechanism complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent introduces a migration buffer as an intermediary data structure that facilitates efficient state information transfer between source and destination hosts. The buffer serves as a temporary storage location that enables parallelized DMA operations, reducing migration latency while maintaining manageable system complexity through a well-defined intermediate component.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces traditional CPU-based data copying mechanisms with DMA (Direct Memory Access) operations. This substitution allows the accelerator to directly transfer state information to and from the migration buffer without CPU intervention, significantly reducing migration latency and CPU load while maintaining implementation feasibility through standard DMA capabilities.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If CPU is used to copy state information from accelerator memory to host memory during live migration, then the implementation is straightforward, but the CPU load increases and migration duration extends

Engineering Contradiction:
Improvemigration speedVSAvoidCPU load
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent replaces CPU-based data copying with DMA operations performed by the accelerator. The accelerator directly transfers state information between its internal memory and the host memory through the migration buffer, eliminating the need for CPU involvement in the data transfer process. This substitution dramatically increases migration speed while reducing CPU load and energy consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent enables the accelerator to perform its own state information migration independently of the CPU. By using DMA operations, the accelerator self-manages the transfer of its state information to and from the migration buffer, freeing the CPU from this task and allowing it to focus on other computational work, thereby improving overall system productivity.

Inventive Principle:
Principle #25Self-service

3Duration of action of moving object

If state information is migrated sequentially without parallelization, then the implementation is simpler, but the migration duration increases and application performance is more impacted

Engineering Contradiction:
Improvemigration durationVSAvoidparallelization complexity
Core Design Contradiction:
Duration of action of moving objectVSDevice complexity

Solution Approach 1:

The patent segments the state information migration process into multiple parallel DMA operations. The migration buffer is organized to allow simultaneous transfer of different portions of state information, breaking down the monolithic migration task into smaller, concurrent operations that can be executed in parallel, thereby reducing overall migration duration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables continuous state information migration through parallelized DMA operations that can proceed simultaneously with VM execution. The migration process maintains continuous useful action by overlapping data transfer with computation, minimizing migration duration and reducing impact on application performance through sustained parallel operations.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the latency and duration of live migrations by minimizing CPU load and optimizing data transfer, ensuring minimal impact on application performance.

Implementation Method 1

the accelerator then performs a direct memory access (DMA) operation to save the first state information in the first migration buffer

Methodology Applied
Scientific EffectDirect Memory Access (DMA):

Data Source

PatentEP4685642A1System and method for parallelized live migration of virtual machines that use accelerators
Publication Date: 2026.01.28 VMWARE INC
  • EP4685642A1 patent drawingFigure 1
  • EP4685642A1 patent drawingFigure 2
  • EP4685642A1 patent drawingFigure 3A~3B

AI summary

A source host computer including a central processing unit (CPU), an accelerator, and memory, is configured to migrate a virtual machine (VM) that uses the accelerator to a destination host computer, by performing the steps of: requesting a driver of the accelerator to save first state information associated with the VM in a first migration buffer of the memory that is accessible to both the CPU and the accelerator, wherein the accelerator then performs a direct memory access (DMA) operation to save the first state information in the first migration buffer; extracting, using the CPU, the first state information from the first migration buffer; and transmitting the extracted first state information to the destination host computer.