AccuGauge Asynchronous Channel Performance Measurement

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Solution Overview

Problem

The challenge in modern ASIC design is the complexity and inefficiency in testing and measuring the performance of asynchronous circuits, which are essential for complex system-on-a-chip (SoC) designs due to their robustness against Process Voltage and Temperature (PVT) variations, but introduce area and routing overheads, and complicate traditional design for testability methods.

Innovation Solution

The AccuGauge technology provides a method to measure the performance of asynchronous channels by injecting data and acknowledging signals within the channels, allowing for unambiguous performance evaluation without interfering with the functionality of the circuits, enabling real-time performance measurements and assessments of speed margins and functionality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If QDI asynchronous circuits are implemented to achieve robustness against PVT variations, then reliability is improved, but device complexity and area overhead increase due to more complex hardware and routing requirements

Engineering Contradiction:

Improverobustness against PVT variationsVSAvoidhardware complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary measurement system that acts as a mediator between the asynchronous circuit under test and the testing equipment. This measurement system includes specialized circuits that translate asynchronous handshake signals into measurable performance metrics, simplifying the overall testing complexity while maintaining the reliability benefits of QDI circuits.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates simplified copies or models of the asynchronous circuit behavior through measurement circuits that replicate the essential handshake protocols. These measurement circuits generate test patterns and capture performance data without requiring full complexity of the actual asynchronous logic, thereby reducing device complexity during testing.

Inventive Principle:

Principle #26Copying

2Reliability

If QDI asynchronous circuits are implemented to achieve robustness against PVT variations, then reliability is improved, but area overhead increases due to more wires required for delay insensitive encoding

Engineering Contradiction:

Improverobustness against PVT variationsVSAvoidarea overhead

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent segments the area overhead by separating the measurement and testing functions from the main asynchronous circuit logic. The measurement system is divided into distinct modules including pattern generators, handshake detectors, and performance analyzers that can be independently optimized and placed only where needed, reducing the overall area impact of testing QDI circuits.

Inventive Principle:

Principle #1Segmentation

3Ease of manufacture

If traditional design for testability methods are applied to asynchronous circuits, then ease of manufacture is improved, but measurement precision deteriorates due to incompatibility with local handshake structures

Engineering Contradiction:

Improvetest compatibilityVSAvoidperformance measurement accuracy

Core Design Contradiction:

Ease of manufactureVSMeasurement precision

Solution Approach 1:

The patent changes the measurement parameters from traditional synchronous clock-based metrics to asynchronous handshake-based metrics. The measurement system captures performance data in terms of handshake cycle counts, latency between handshakes, and throughput rates, which are native to asynchronous operation. This parameter transformation enables both ease of manufacture through standard testing approaches and high measurement precision specific to asynchronous circuits.

Inventive Principle:

Principle #35Parameter changes

4Adaptability or versatility

If asynchronous circuits are designed to accommodate delay variations, then adaptability is improved, but performance predictability worsens making testing and binning more complicated

Engineering Contradiction:

Improvedelay variation accommodationVSAvoidperformance predictability

Core Design Contradiction:

Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent implements feedback mechanisms in the measurement system that continuously monitor actual performance metrics and compare them against expected ranges. The measurement circuits capture handshake timing data and feed it back to the binning system, enabling dynamic adjustment of performance thresholds. This feedback loop maintains performance predictability despite the inherent adaptability of asynchronous circuits to delay variations.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS11418269B2System and methods for measuring performance of an application specific integrated circuit interconnect

Publication Date: 2022.08.16 CHRONOS TECHNOLOGIES LLC

AI summary

This application discloses circuits and apparatus configured to measure performance of asynchronous circuits by injecting data in to inputs of asynchronous circuits and consuming data from the outputs without interfering in the functionality of the asynchronous circuits. This application also discloses systems and methods for assessing the performance of asynchronous channels and/or IP blocks by providing an unambiguous performance value which can be used for performance analysis and comparison.