Accumulator Constrained Quantization for CNN Memory Optimization

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Solution Overview

Problem

Convolutional neural networks (CNNs) face challenges in efficient execution on computing platforms without wide accumulation support, leading to data bottlenecks and increased computational resources due to their reliance on high-precision floating-point arithmetic, which is memory-intensive and resource-heavy.

Innovation Solution

The implementation of accumulator-constrained quantization techniques that adapt CNNs to operate within narrow accumulator bit widths, optimizing performance by selecting optimal quantization points based on parameter and data bit widths, and using integer or fixed-point representations to reduce memory footprint and improve computation speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high-precision floating-point arithmetic is used in CNNs, then inference accuracy is improved, but memory usage and computational resources increase

Engineering Contradiction:
Improveinference accuracyVSAvoidmemory usage
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent changes the precision parameter of numerical representations from high-precision floating-point to lower-precision integer or fixed-point formats. This parameter change reduces memory usage and computational resource requirements while maintaining acceptable inference accuracy through careful quantization design and calibration processes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent creates quantized copies of the original floating-point model parameters and computations. These quantized copies operate in lower-precision integer or fixed-point arithmetic, providing a memory-efficient alternative that closely approximates the behavior of the original high-precision model.

Inventive Principle:
Principle #26Copying

2Measurement precision

If high-precision floating-point arithmetic is used in CNNs, then inference accuracy is improved, but computational resources increase

Engineering Contradiction:
Improveinference accuracyVSAvoidcomputational resources
Core Design Contradiction:
Measurement precisionVSPower

Solution Approach 1:

The patent changes the computational precision parameter from floating-point to integer or fixed-point arithmetic. This parameter change reduces the computational power required for matrix multiplications and convolutions in CNNs, making the system more energy-efficient while maintaining acceptable accuracy through quantization techniques.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the mechanical floating-point arithmetic system with an integer or fixed-point arithmetic system. This substitution replaces complex floating-point unit operations with simpler integer arithmetic operations, reducing computational resource requirements and energy consumption.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Quantity of substance

If quantization is applied to reduce memory footprint, then memory usage is reduced, but recognition performance degrades

Engineering Contradiction:
Improvememory footprintVSAvoidrecognition performance
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent applies different quantization strategies to different parts of the neural network based on their sensitivity to precision changes. Critical layers that heavily impact recognition performance receive higher precision or more careful quantization treatment, while less sensitive layers use more aggressive quantization to maximize memory compression.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs calibration and fine-tuning processes where the quantized model is evaluated on validation data, and quantization parameters are adjusted based on performance feedback. This iterative optimization ensures that memory footprint is reduced while recognition performance degradation is minimized or corrected.

Inventive Principle:
Principle #23Feedback

4Device complexity

If narrow accumulator bit width is used, then device complexity is reduced, but data bottlenecks occur

Engineering Contradiction:
Improveaccumulator bit widthVSAvoidcomputation speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the accumulation process into multiple passes or stages, each handling a subset of computations. This segmentation allows narrow accumulators to process data in manageable chunks without requiring wide accumulator hardware, thereby reducing device complexity while maintaining computational throughput through efficient batching and memory management.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9916531B1Accumulator constrained quantization of convolutional neural networks
Publication Date: 2018.03.13 INTEL CORP
  • US9916531B1 patent drawing
  • US9916531B1 patent drawing
  • US9916531B1 patent drawing

AI summary

An apparatus is described herein. The apparatus comprises an accumulator, a controller, and a convolutional neural network. The accumulator is to accumulate a plurality of values within a predetermined bit width. The controller is to determine a parameter quantization and a data quantization. The convolutional neural network is adapted to the data quantization, wherein a quantization point is selected based on the parameter quantization, data quantization, and accumulator bit width.