ACF Primary FET Dead-Time Calibration for Zero-Voltage Switching
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Solution Overview
Problem
Existing power adapters using active clamp flyback circuits face inefficiencies due to variable timing in switching high-side and low-side FETs, leading to cross-conduction risks and suboptimal zero-voltage switching, which current methods to address these issues require additional components or pins, complicating the design.
Innovation Solution
A secondary-side controlled dead-time calibration scheme is implemented to measure and adjust the timing differences between switching the primary high-side and low-side FETs, optimizing zero-voltage switching without additional board components or pins, by utilizing secondary-side zero-cross detection and energy resonance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional fixed dead-time control is used for switching high-side and low-side FETs, then the circuit design is simple, but cross-conduction risks occur and zero-voltage switching is suboptimal
Solution Approach 1:
The patent implements a feedback mechanism where the controller measures the actual timing difference between FET switching events using zero-cross detection circuits, then adjusts the dead-time parameter dynamically based on measured values. This closed-loop feedback ensures reliable cross-conduction prevention while maintaining optimal zero-voltage switching conditions.
Solution Approach 2:
The dead-time parameter is transformed from a fixed value to a dynamically adjustable parameter. The controller modifies the dead-time duration in real-time based on measured timing differences, allowing the system to adapt to varying operating conditions and achieve optimal switching performance without excessive complexity.
2Manufacturing precision
If additional components or pins are added to control FET switching timing, then switching precision is improved, but the bill of materials and design complexity increase
Solution Approach 1:
The system uses its own existing operational signals (zero-cross detection signals from normal FET switching) to measure timing differences, rather than requiring external measurement equipment. The controller leverages signals already present in the circuit to self-calibrate the dead-time parameter, eliminating the need for additional measurement components.
Solution Approach 2:
The zero-cross detection circuits, originally designed for basic switching control, are dual-used for both normal operation and timing measurement. The same control pins and signal paths serve multiple functions: FET driving, timing measurement, and dead-time calibration, thereby achieving precise control without additional hardware.
3Loss of energy
If variable dead-time is implemented to optimize zero-voltage switching, then efficiency is improved, but the control mechanism becomes more complex
Solution Approach 1:
The patent changes the dead-time parameter from fixed to variable based on measured timing differences. By adjusting this single parameter dynamically, the system achieves optimal zero-voltage switching conditions that minimize switching losses, while the implementation remains relatively simple by using existing control infrastructure.
Solution Approach 2:
The controller performs preliminary measurement of timing differences during initial operation or calibration phase, then uses this pre-measured information to set optimal dead-time values before actual power conversion begins. This preliminary action ensures efficient switching from the start without requiring complex real-time adjustment mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances efficiency by ensuring optimal zero-voltage switching, reducing cross-conduction risks and improving overall system performance without increasing the bill of materials or design complexity.
Implementation Method 1
a previously reverse-magnetized inductance can resonate with an output capacitance of the primary low-side FET
Data Source
AI summary
A method comprising controlling operation, by a secondary-side controlled Universal Serial Bus Power Delivery (USB-PD) alternating current to direct current (AC-DC) converter, a low-side field-effect transistor (FET). In response to controlling operation of the low-side FET, the method further includes triggering a zero-cross detection circuit. The method further includes measuring a first period of time between controlling operation of the low-side FET and triggering the zero-cross detection circuit. The method further includes measuring a second period of time between controlling operation of a high-side FET and triggering the zero-cross detection circuit. The method further includes adjusting a third period of time based on the first period of time and the second period of time, wherein the third period of time corresponds to a dead time between controlling operation of the high-side FET and the low-side FET.