Acoustic Wave Device Bump Segmentation for Chip Strength
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Solution Overview
Problem
Acoustic wave devices face challenges in enhancing chip strength without increasing the number of bumps, as adding more bumps increases the chip area and affects stability and electrical characteristics, and existing thinning methods prevent underfill formation, leading to reduced strength and increased vulnerability to impact.
Innovation Solution
The acoustic wave device incorporates a chip with an acoustic wave element, a first pad, a substrate with a second pad, and two types of bumps: one between the pads for electrical connection and another between the chip and substrate for mechanical reinforcement, allowing direct contact and maintaining a reduced size by optimizing bump sizes and placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the number of bumps is increased to enhance chip strength, then chip strength is improved, but chip area increases and bump bonding stability decreases
Solution Approach 1:
The invention divides the bump population into two functional segments: first bumps for electrical connection between pads, and second bumps for mechanical reinforcement between chip and substrate. This segmentation allows each type of bump to be optimized for its specific function, enabling chip strength enhancement without requiring a uniform increase in total bump count across the entire chip area.
Solution Approach 2:
The invention applies different bump configurations to different locations and functions: first bumps are positioned at pad locations for electrical connectivity, while second bumps are positioned in regions requiring mechanical support. This local differentiation optimizes the distribution of bumps based on specific functional requirements rather than uniform distribution, improving strength without proportionally increasing chip area.
2Volume of moving object
If thinning method is applied to reduce size and height, then acoustic wave device size is reduced, but underfill cannot be formed and chip strength decreases
Solution Approach 1:
The invention extracts the underfill formation step from the manufacturing process by using a thinned chip design where the lower surface directly faces the substrate. This eliminates the need for underfill material while maintaining structural integrity through the alternative reinforcement mechanism of second bumps making direct contact with the substrate, thereby achieving both size reduction and strength maintenance.
Solution Approach 2:
The invention changes the structural parameters of the chip by thinning it to reduce overall device size and height. Simultaneously, it compensates for the strength loss from thinning by introducing second bumps that make direct contact with the substrate, effectively changing the reinforcement mechanism from reliance on underfill to reliance on direct bump-substrate contact.
3Adaptability or versatility
If excitation electrode is formed on lower surface of chip, then acoustic wave can be excited, but underfill cannot be formed between chip and substrate
Solution Approach 1:
The invention segments the bump population into first bumps for electrical connection and second bumps for mechanical reinforcement. This allows the excitation electrode to remain on the lower surface for acoustic wave generation while second bumps provide the necessary mechanical support that would otherwise be provided by underfill, resolving the conflict between electrode placement and structural strength.
Data Source
AI summary
An acoustic wave device includes: a chip; an acoustic wave element formed on a principal surface of the chip; a first pad formed on the principal surface of the chip and electrically connected to the acoustic wave element; a substrate having a principal surface facing the principal surface of the chip; a second pad formed on the principal surface of the substrate; a first bump formed between the first pad and the second pad and electrically connecting the first pad and the second pad; and a second bump formed between the chip and the substrate and making direct contact with the substrate.