ACPI Non-PCI Device Emulation for Low Latency HDD Protection

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Solution Overview

Problem

Non-PCI devices, such as I2C bus accelerometers, lack the capability for low latency event communication due to their non-compliance with industry standards, leading to increased HDD damage during freefall events due to higher latency in detecting and signaling the CPU.

Innovation Solution

The system employs a hardware identification object (_HID) to allow non-PCI devices to emulate PCI capabilities within the ACPI namespace table, enabling the assignment of IRQs and other PCI resources, thereby facilitating low latency event communication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If non-PCI devices (such as I2C bus accelerometers) are used to detect freefall events, then device cost is reduced and compatibility is improved, but communication latency increases leading to higher HDD damage risk

Engineering Contradiction:
ImproveHDD damage preventionVSAvoidEvent communication latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces an intermediary translation layer that converts I2C bus messages into simulated PCI interrupt requests. This mediator translates the communication protocol of non-PCI accelerometers into a format that the system's PCI-based interrupt handling infrastructure can process, thereby enabling low-latency communication without requiring expensive PCI-compliant accelerometer hardware.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If PCI-compliant accelerometers are used, then low latency event communication is achieved, but device cost increases

Engineering Contradiction:
ImproveEvent communication latencyVSAvoidDevice cost
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

The patent changes the communication parameter protocol by translating I2C bus messaging into PCI interrupt request format. This parameter transformation allows the system to achieve the low-latency characteristics of PCI devices while using more cost-effective I2C bus accelerometers, effectively decoupling the latency performance from the hardware cost.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If I2C bus messaging methods are used for communication, then device compatibility is improved, but communication speed decreases resulting in increased HDD damage likelihood

Engineering Contradiction:
ImproveDevice compatibilityVSAvoidEvent communication speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent substitutes the mechanical I2C bus messaging protocol with an electronic interrupt request mechanism. By translating I2C messages into PCI-style interrupt requests, the system replaces the slower serial I2C communication mechanism with a faster interrupt-driven electronic signaling method, achieving both compatibility with I2C accelerometers and the high-speed response needed for HDD protection.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS7644222B2Low latency event communication system and method
Publication Date: 2010.01.05 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US7644222B2 patent drawing
  • US7644222B2 patent drawing
  • US7644222B2 patent drawing

AI summary

A low latency event communication system comprises a computer system having an Advanced Configuration and Power Interface (ACPI) namespace table with a Peripheral Component Interconnect (PCI) branch and a non-PCI device described in the PCI branch to enable the non-PCI device to be assigned a PCI resource.