Across-Wafer Profile Control Using Polynomial Gain Matrices

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Solution Overview

Problem

Conventional methods fail to provide optimal across-wafer profile control in semiconductor manufacturing, leading to inline variability, system downtime, and increased costs due to lost capacity and scrapped wafers as device size shrinks.

Innovation Solution

A method involving a processor that fits a target semiconductor process profile to a polynomial, determines gain matrices between process inputs and polynomial coefficients, estimates offsets, and optimizes process inputs using an objective function to minimize squared deviations between estimated and target profiles, implemented in a system or computer program product.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional profile control methods are used, then manufacturing simplicity is maintained, but across-wafer uniformity deteriorates leading to inline variability and scrapped wafers

Engineering Contradiction:
Improveacross-wafer uniformityVSAvoidcontrol method complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the across-wafer profile control into multiple discrete process steps, each with specific control parameters. The wafer surface is divided into radial zones (inner, middle, outer rings) with distinct target profiles, allowing localized optimization of uniformity without requiring complete system redesign.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes control parameters by fitting target profiles to polynomials and determining gain matrices between process inputs and polynomial coefficients. This mathematical transformation converts complex profile control into optimized parameter adjustments, improving across-wafer uniformity while maintaining manageable complexity through systematic parameter optimization.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If across-wafer profile control is not optimized, then process simplicity is maintained, but productivity decreases due to system downtime and scrapped wafers

Engineering Contradiction:
Improvemanufacturing capacityVSAvoidprofile control accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent implements feedback control by estimating offsets between polynomial coefficients and process inputs, then using this information to optimize subsequent process inputs. This closed-loop approach ensures high profile control accuracy, preventing defects and reducing scrapped wafers, thereby maintaining high productivity without compromising precision.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent performs preliminary optimization by determining gain matrices and fitting target profiles before actual processing. This advance preparation allows the system to predict and correct potential profile deviations, preventing system downtime and reducing the need for rework or scrapping, thus improving productivity.

Inventive Principle:
Principle #10Preliminary action

3Length of moving object

If device size shrinks, then product miniaturization is achieved, but manufacturing precision requirements increase making conventional control insufficient

Engineering Contradiction:
Improvedevice sizeVSAvoidprofile control margin
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The patent applies local quality control by defining different target profiles for different radial zones of the wafer (inner ring, middle ring, outer ring). This localized approach allows precise control of profile characteristics in each zone, meeting the stringent precision requirements necessary for shrinking device sizes while maintaining overall process efficiency.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10754319B1Across-wafer profile control in semiconductor processes
Publication Date: 2020.08.25 GLOBALFOUNDRIES US INC
  • US10754319B1 patent drawing
  • US10754319B1 patent drawing

AI summary

Methods of controlling an across-wafer profile of a semiconductor process, as well as related systems and computer program products. A target profile of a semiconductor process over a radius of a wafer is fit to a polynomial. A plurality of gain matrices between a first plurality of process inputs and a plurality of polynomial coefficients of the polynomial are determined. An offset is estimated between the plurality of polynomial coefficients and an effect of the first plurality of process inputs. An objective function is defined as an integral of a squared deviation between an estimated profile and the target profile over the radius of the wafer. A second plurality of process inputs are mapped to the objective function by vector convolution using the plurality of gain matrices. The objective function is solved to optimize the second plurality of process inputs.