Active Area Etching with Dielectric Sidewall Protection

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Solution Overview

Problem

Conventional semiconductor manufacturing processes, particularly dry etching, often damage the ends of active areas due to high-energy charged particles, leading to performance issues in shrinking integrated circuits.

Innovation Solution

A semiconductor manufacturing method involving the deposition of a first dielectric layer on the side walls of a pattern as a protective layer, followed by etching to form a second pattern, where the second dielectric layer fills trenches and is subsequently removed, thereby protecting the ends of active areas during the etching process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional etching process is used to fabricate active area, then manufacturing process can be completed, but ends of active area are damaged

Engineering Contradiction:
Improvemanufacturing process completionVSAvoidactive area integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A protective dielectric layer is deposited on the substrate before the etching process to prevent damage to the ends of active areas. This preliminary protective action ensures that the subsequent etching process can be completed without compromising the integrity of the active area ends.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A dielectric layer is introduced as an intermediary between the etching process and the active area. This intermediate layer acts as a buffer that protects the active area ends from direct exposure to the harmful etching environment while still allowing the etching process to proceed.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of moving object

If feature size of integrated circuit is reduced, then circuit integration is improved, but manufacturing precision requirement increases

Engineering Contradiction:
Improveactive area sizeVSAvoidetching precision
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The patent modifies the etching process parameters by introducing a protective dielectric layer, which changes the interaction between the etching plasma and the substrate. This parameter change allows for precise etching of smaller features while protecting vulnerable areas, thereby maintaining manufacturing precision at reduced feature sizes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the direct mechanical/physical etching action on the active area with a chemically-mediated process where the dielectric layer undergoes selective removal. This substitution allows for more controlled and precise material removal at smaller dimensions where direct etching would cause damage.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If protective dielectric layer is deposited, then active area ends are protected from damage, but process complexity increases

Engineering Contradiction:
Improveactive area integrityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The protective dielectric layer is temporarily introduced during the manufacturing process and then selectively removed after serving its protective function. This temporary protective measure prevents permanent damage to the active area ends while adding only transient complexity to the overall process.

Inventive Principle:
Principle #34Discarding and recovering

Solution Approach 2:

The harmful elements are extracted or separated from the etching process by using the dielectric layer as a barrier. The protective layer is selectively removed after protecting the active area, effectively taking out the damage-causing interaction between the etching process and the active area ends.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively reduces damage to the ends of active areas during etching, enhancing the performance and integrity of integrated circuits by using a protective dielectric layer to shield the pattern from high-energy particles.

Implementation Method 1

a first dielectric layer is deposited onto the substrate. The first dielectric layer covers at least one side wall of the first pattern

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Implementation Method 2

a second dielectric layer is deposited onto the substrate. The second dielectric layer fills the first trenches

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS11869801B2Semiconductor manufacturing method
Publication Date: 2024.01.09 CHANGXIN MEMORY TECH INC
  • US11869801B2 patent drawing
  • US11869801B2 patent drawing
  • US11869801B2 patent drawing

AI summary

The present invention provides a semiconductor manufacturing method. A substrate having a plurality of first trenches can be provided. The substrate can include a first pattern formed between two adjacent first trenches. A first dielectric layer can be deposited onto the substrate. The first dielectric layer can cover at least one side wall of the first pattern. A second dielectric layer can be deposited onto the substrate. The second dielectric layer can fill the first trenches. The first pattern can be severed to form a second pattern on the substrate. The second dielectric layer can be removed from the first trenches.