Active Area Patterning With Dual-Photosensitivity Mask Layers

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Solution Overview

Problem

The challenge of precisely defining small active areas in semiconductor devices with dimensions less than 37 nm is difficult using electron beam lithography, and extreme ultraviolet lithography is costly and increases process and product costs.

Innovation Solution

A method involving the use of photosensitive materials with different sensitivities to define active areas, utilizing a first and second mask layer with varying optical transmission rates to form precise patterns on a substrate, including the formation of dielectric layers and recesses to achieve smaller dimensions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If electron beam lithography is used to define small active areas with dimensions less than 37 nm, then manufacturing precision is improved, but device complexity and process cost increase

Engineering Contradiction:
Improveactive area dimension precisionVSAvoidlithography process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the patterning process into multiple stages using different mask layers with varying photosensitivities. The first mask layer handles initial patterning while the second mask layer refines the pattern to achieve sub-37nm dimensions, breaking down the complex lithography task into manageable segments that can be executed with standard equipment

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by using mask layers with different photosensitivity characteristics in different regions of the patterning process. The first mask layer has lower photosensitivity for broader area patterning, while the second mask layer has higher photosensitivity for precise local feature definition, optimizing the balance between precision and process complexity

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If extreme ultraviolet lithography is used to define small active areas, then manufacturing precision is improved, but product cost increases

Engineering Contradiction:
Improveactive area dimension precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent employs disposable mask layers that are consumed during the patterning process. These mask layers are designed to be used once and then removed, replacing the need for expensive reusable extreme ultraviolet lithography systems while achieving comparable patterning precision through clever material selection and process design

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent changes the photosensitivity parameter of the mask layers to enable precise patterning with conventional lithography equipment. By selecting materials with appropriate photosensitivity ranges and adjusting exposure parameters, the process achieves sub-37nm precision without requiring extreme ultraviolet wavelengths, significantly reducing manufacturing costs

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables the formation of smaller active areas with precise dimensions using electron beam lithography, reducing costs associated with extreme ultraviolet lithography by employing a cost-effective method.

Implementation Method 1

a photoresist layer is formed over the first mask layer, wherein a photosensitivity of the photoresist layer is different from a photosensitivity of the first mask layer

Methodology Applied
Scientific EffectPhotosensitivity: Photo-oxidation

Data Source

PatentUS12394662B2Method for patterning active areas comprising different operations in semiconductor structure
Publication Date: 2025.08.19 NAN YA TECH
  • US12394662B2 patent drawing
  • US12394662B2 patent drawing
  • US12394662B2 patent drawing

AI summary

A method for manufacturing a semiconductor structure is provided. A first mask layer and a photoresist layer are formed over a substrate, wherein photosensitivities of the photoresist layer and the first mask layer are different. A first and a second opening are formed, wherein the first mask layer overlapped by the second opening is degraded to form a second mask layer. The substrate exposed by the first opening is partially removed to form a first recess of the substrate. The second mask layer is removed to form a third opening through the first mask layer. A first dielectric layer is formed, wherein the first dielectric layer fills the first recess and the third opening and covers the substrate overlapped by the third opening. A patterning operation is performed on the substrate using the first dielectric layer as a mask, and a second recess of the substrate is thereby formed.