Semiconductor Active Area Patterning With Dielectric Sidewall Protection

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Solution Overview

Problem

Conventional semiconductor manufacturing processes, particularly dry etching, often damage the ends of active areas due to high-energy charged particles, leading to performance issues as the size of semiconductor structures decreases.

Innovation Solution

A method involving the formation of a first dielectric layer on the side walls of a pattern as a protective layer, followed by severing to create active areas, which reduces damage during the etching process by protecting the ends of the active areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If dry etching process is used to etch and form active areas, then manufacturing efficiency is improved, but damage to ends of active areas occurs due to high-energy charged particles

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoiddamage to ends of active areas
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

A protective layer is formed on the substrate before the etching process to prevent damage to the ends of active areas. This preliminary protective action allows the use of aggressive etching processes while maintaining the integrity of the active area ends.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protective layer acts as an intermediary between the high-energy charged particles and the active areas. It absorbs or deflects the harmful particles during etching, preventing direct damage to the active area ends while allowing the etching process to proceed efficiently.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Area of stationary object

If the size of active areas is reduced to increase memory density, then storage capacity is improved, but manufacturing precision requirements become more stringent

Engineering Contradiction:
Improveactive area sizeVSAvoidprecision requirement
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The protective layer is formed in advance with precise thickness control to ensure that subsequent etching processes can be performed with relaxed precision requirements. The protective layer compensates for variations in etching depth, ensuring uniform active area dimensions even at reduced sizes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The thickness of the protective layer is carefully controlled and optimized to achieve the desired active area dimensions. By adjusting this parameter, the process can accommodate smaller active areas while maintaining manufacturing precision through the protective layer's compensating effect.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively minimizes damage to the ends of active areas during the etching process, enhancing the performance and reliability of semiconductor structures by using a protective dielectric layer to shield the pattern during the severing process.

Implementation Method 1

a first dielectric layer is formed, wherein the first dielectric layer covers at least side walls of the first pattern

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentEP3944300B1Method for preparing semiconductor structure
Publication Date: 2024.07.31 CHANGXIN MEMORY TECH INC
  • EP3944300B1 patent drawingFigure 1
  • EP3944300B1 patent drawingFigure 2~3
  • EP3944300B1 patent drawingFigure 4~5

AI summary

The present invention provides a method for manufacturing a semiconductor structure. The method includes that: a substrate having a plurality of first trenches is provided. A first pattern is formed between two adjacent first trenches. A first dielectric layer is formed. The first dielectric layer covers at least side walls of the first pattern. A second dielectric layer is formed. The second dielectric layer fills the first trenches. The first pattern is severed to form a second pattern. The second dielectric layer is removed.