Active Bootstrap Half-Bridge Rectifier for Fast Capacitor Recharge

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Solution Overview

Problem

Conventional bootstrap circuits in offline switching voltage converters face limitations due to diode forward voltage drops and reverse recovery, which restrict fast switching slew rates and increase minimum low-side on-time for recharging the bootstrap capacitor, especially when using GaN FETs.

Innovation Solution

The proposed solution involves an active bootstrap rectifier circuit using a GaN FET in series with a low-voltage silicon FET, controlled by a gate drive amplifier, which synchronizes with the low-side FET to manage the gate-drain voltage and current, eliminating the need for series resistors and enabling faster recharge of the bootstrap capacitor without diode limitations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional bootstrap circuit with diode is used, then the circuit structure is simple, but the switching speed is limited due to diode forward voltage drops and reverse recovery

Engineering Contradiction:
Improveswitching speedVSAvoidcircuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent extracts and removes the diode component from the conventional bootstrap circuit, replacing it with an active switch (GaN FET). This elimination of the diode's reverse recovery limitation directly enables faster switching speeds while the active switch provides more controllable operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the operating parameters by using a GaN FET with significantly faster switching characteristics compared to conventional diodes. The active switch allows for controlled turn-on and turn-off timing, enabling optimization of the charging current waveform and achieving faster bootstrap capacitor recharge.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If series resistors are used to limit peak current, then the GaN FET is protected from damage, but the recharge speed of the bootstrap capacitor is reduced

Engineering Contradiction:
Improvecapacitor recharge speedVSAvoidGaN FET protection
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a feedback control mechanism where the gate drive amplifier monitors and controls the gate-drain voltage of the GaN FET. This feedback loop dynamically adjusts the switching behavior to limit peak current and protect the device while maintaining fast recharge performance, eliminating the need for series resistors.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent employs dynamic control of the GaN FET switching parameters, adjusting the gate voltage waveform in real-time to optimize both protection and performance. The active control enables the circuit to adaptively manage peak current stresses while maximizing recharge speed.

Inventive Principle:
Principle #15Dynamics

3Productivity

If the minimum low-side on-time is increased to recharge the bootstrap capacitor, then the capacitor charges adequately, but the overall conversion efficiency decreases

Engineering Contradiction:
Improveconversion efficiencyVSAvoidlow-side on-time
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The patent enables the bootstrap capacitor to recharge rapidly during the brief low-side on-time period by using the GaN FET's fast switching capability. The active switch allows the circuit to 'rush through' the charging process quickly, completing adequate recharge in a shorter time window and thereby reducing the minimum required on-time.

Inventive Principle:
Principle #21Skipping (Rushing through)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances switching speed and reduces the risk of GaN FET damage by limiting gate-drain voltage and providing regulated current, thus improving the overall efficiency and speed of voltage conversion.

Implementation Method 1

A current source is coupled between the second resistor terminal and a ground terminal

Methodology Applied
Scientific EffectElectrical current flow: Conduction (electrical)

Implementation Method 2

An amplifier has first and second amplifier inputs and a first amplifier output. The first amplifier input is coupled to the second resistor terminal, and the second amplifier input is coupled to the fourth resistor terminal

Methodology Applied
Scientific EffectVoltage amplification: Magnetic Amplifier

Implementation Method 3

A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output

Methodology Applied
Scientific EffectField effect transistor conduction control: Conduction (electrical)

Data Source

PatentUS12062995B2Synchronous bootstrap half bridge rectifier
Publication Date: 2024.08.13 TEXAS INSTRUMENTS INC
  • US12062995B2 patent drawing
  • US12062995B2 patent drawing
  • US12062995B2 patent drawing

AI summary

Described embodiments include a rectifier circuit comprising a first resistor with first and second resistor terminals, and a second resistor with third and fourth resistor terminals. The first and third resistor terminals are coupled to an auxiliary power terminal. A current source is coupled between the second resistor terminal and a ground terminal. An amplifier has a first amplifier input coupled to the second resistor terminal, and a second amplifier input coupled to the fourth resistor terminal. A first transistor is coupled between the fourth resistor terminal and a damping terminal, and has a first control terminal coupled to the first amplifier output. A gate drive circuit has an input coupled to the damping terminal. A second transistor is coupled between the damping terminal and a bootstrap supply terminal, and has a second control terminal coupled to an output of the gate drive circuit.