Active Bridge Native Interconnects for Low-Latency Chiplet Coupling
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Solution Overview
Problem
Conventional microelectronic devices face performance limitations due to high latency and space constraints, as chiplets are often connected to microchips using standard interfaces that require significant space and result in increased defects with larger die areas, leading to reduced performance.
Innovation Solution
The use of active bridges with native interconnects and direct bonding techniques to couple microchips and chiplets, allowing for a finer pitch and reduced latency by moving interfaces closer to processors and eliminating the need for standard interfacing protocols, thereby increasing speed and freeing up space for additional circuitry and functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If standard interfaces are used to connect chiplets to microchips, then compatibility and ease of integration are improved, but die area increases and latency increases
Solution Approach 1:
The patent extracts the standard interface protocol requirements from the connection between microchip and chiplet by introducing an active bridge die. The active bridge die assumes the role of the standard interface controller, allowing the microchip and chiplet to connect through simplified native interconnects without implementing full standard interface protocols, thereby reducing the required die area while maintaining compatibility.
Solution Approach 2:
The active bridge die acts as an intermediary component between the microchip and chiplet. It provides the necessary interface functionality and protocol handling while enabling direct native interconnects between the microchip and chiplet, thus reducing the overall die area required compared to implementing standard interfaces directly on both components.
2Reliability
If standard interfaces with level-shifting and signal amplification are implemented, then signal integrity is improved, but device complexity and space requirements increase
Solution Approach 1:
The patent extracts the signal integrity management functions (level-shifting, signal amplification, ESD protection) from the microchip and chiplet designs and consolidates them into the active bridge die. This allows the microchip and chiplet to use simpler native interconnects while the active bridge die handles all signal conditioning requirements, reducing overall device complexity.
Solution Approach 2:
The active bridge die serves as an intermediary that manages signal integrity between the microchip and chiplet. It performs level-shifting, signal amplification, and ESD protection functions, allowing the connected components to use simpler interconnects without compromising signal quality, thus reducing interface complexity.
3Area of stationary object
If chiplets are mounted in side-by-side configuration around microchip periphery, then space utilization is improved, but connection latency increases due to longer connection paths
Solution Approach 1:
The patent changes the interconnect parameter from standard interface protocols to native interconnects with finer pitch when using active bridge dies. This parameter change enables shorter connection paths and reduced latency while maintaining the space-efficient side-by-side mounting configuration of chiplets around the microchip periphery.
Data Source
AI summary
Techniques and mechanisms for coupling chiplets to microchips utilizing active bridges. The active bridges include circuits that provide various functions and capabilities that previously may have been located on the microchips and/or the chiplets. Furthermore, the active bridges may be coupled to the microchips and the chiplets via “native interconnects” utilizing direct bonding techniques. Utilizing the active bridges and the direct bonding techniques of the active bridges to the microchips and the chiplets, the pitch for the interconnects can be greatly reduced going from a pitch in the millimeters to a fine pitch that may be in a range of less than one micron to approximately five microns.